component
LM317LBDR2G
Public Made by Adomby adom
onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLM317LBDR2G
onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
LM317LBDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vin | power_in | Input supply voltage for the regulator; maximum input-output voltage differential VI-VO = 40 Vdc |
| 2 | Vout | power_out | Regulated output voltage; output voltage range 1.2 V to 37 V |
| 3 | Vout | power_out | Regulated output voltage; output voltage range 1.2 V to 37 V |
| 4 | Adjust | output | Reference voltage terminal providing 1.25 V nominal above ground; external resistor divider connected to this pin sets the regulated output voltage |
| 5 | N.C. | unconnected | No connection |
| 6 | Vout | power_out | Regulated output voltage; output voltage range 1.2 V to 37 V |
| 7 | Vout | power_out | Regulated output voltage; output voltage range 1.2 V to 37 V |
| 8 | N.C. | unconnected | No connection |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Line Regulation (TA = 25°C) | Regline | 0.01 | 0.04 | %/V | TA = 25°C, 3.0 V ≤ VI − VO ≤ 40 V | 3 | |
| Load Regulation (TA = 25°C, VO ≤ 5.0 V) | Regload | 5 | 25 | mV | TA = 25°C, 10 mA ≤ IO ≤ Imax, VO ≤ 5.0 V | 3 | |
| Load Regulation (TA = 25°C, VO ≥ 5.0 V) | Regload | 0.1 | 0.5 | % VO | TA = 25°C, 10 mA ≤ IO ≤ Imax, VO ≥ 5.0 V | 3 | |
| Adjustment Pin Current | IAdj | 50 | 100 | µA | 3 | ||
| Adjustment Pin Current Change | IAdj | 0.2 | 5 | µA | 2.5 V ≤ VI − VO ≤ 40 V, PD ≤ Pmax, 10 mA ≤ IO ≤ Imax | 3 | |
| Reference Voltage | Vref | 1.2 | 1.25 | 1.3 | V | 3.0 V ≤ VI − VO ≤ 40 V, PD ≤ Pmax, 10 mA ≤ IO ≤ Imax | 3 |
| Line Regulation (Tlow to Thigh) | Regline | 0.02 | 0.07 | %/V | 3.0 V ≤ VI − VO ≤ 40 V | 3 | |
| Load Regulation (Tlow to Thigh, VO ≤ 5.0 V) | Regload | 20 | 70 | mV | 10 mA ≤ IO ≤ Imax, VO ≤ 5.0 V | 3 | |
| Load Regulation (Tlow to Thigh, VO ≥ 5.0 V) | Regload | 0.3 | 1.5 | % VO | 10 mA ≤ IO ≤ Imax, VO ≥ 5.0 V | 3 | |
| Minimum Load Current to Maintain Regulation | ILmin | 3.5 | 10 | mA | VI − VO = 40 V | 3 | |
| Ripple Rejection (VO = 1.2 V) | RR | 60 | 80 | dB | VO = 1.2 V, f = 120 Hz | 3 | |
| Ripple Rejection (CAdj = 10 µF, VO = 10.0 V) | RR | 80 | dB | CAdj = 10 µF, VO = 10.0 V | 3 | ||
| Long Term Stability | S | 0.3 | 1 | %/1.0 k Hrs. | TJ = Thigh; TA = 25°C for endpoint measurements | 3 | |
| Input-Output Voltage Differential | VI−VO | 40 | Vdc | 2 | |||
| Maximum Junction Temperature | TJMAX | 150 | °C | 2 | |||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| Operating Junction Temperature Range (LM317LB grade) | TJ | -40 | 125 | °C | LM317LBDR2G per ordering table; Tlow to Thigh = −40°C to +125°C (Note 3) | 9 | |
| Maximum Power Dissipation (Pmax) | Pmax | 625 | mW | Note 4: Imax = 100 mA | 3 | ||
| Temperature Stability (Tlow ≤ TJ ≤ Thigh) | TS | 0.7 | % VO | Tlow ≤ TJ ≤ Thigh | 3 | ||
| RMS Noise | N | 0.003 | % VO | TA = 25°C, 10 Hz ≤ f ≤ 10 kHz | 3 | ||
| Thermal Shutdown | 180 | °C | 3 | ||||
| Thermal Resistance, Junction-to-Ambient (SOIC-8, Case 751) | RJA | 180 | °C/W | Case 751 SOIC-8, TA = 25°C, minimum recommended pad size (Note 1) | 2 | ||
| Thermal Resistance, Junction-to-Case (SOIC-8, Case 751) | RJC | 45 | °C/W | Case 751 SOIC-8, TA = 25°C | 2 |
CAD (KiCad official)
- Symbol:
LM317LBDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
lm317lbdr2g-etched.step/lm317lbdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm317lbdr2g.step/lm317lbdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (11 pp, sha256
146364af02ceebcc, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).