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Contents

README

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LM317D2T-TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-263-2

LM317D2T-TR from STMicroelectronics, in a TO-263-2. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ADJUST bidirectional Adjustment terminal that sets the constant 1.25 V reference across external resistor R1; draws a typical 50 µA (max 100 µA) adjustment-pin current with only 0.2-5 µA change over line/load, used with an external resistor divider to program VO = VREF(1+R2/R1) + IADJ·R2.
2 OUTPUT power_out Regulated output terminal, internally referenced 1.25 V (1.2-1.3 V typ) above the ADJUST pin; delivers output current in excess of 1.5 A (up to 2.2 A max for VI-VO ≤15 V) and is electrically the same net as the package tab used for heat-sinking.
3 INPUT power_in Unregulated input supply terminal; the input-to-output differential voltage (VI-VO) must not exceed the 40 V absolute maximum rating, with electrical characteristics specified at VI-VO = 5 V and a 2.5-40 V operating differential range.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-263-2
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Line regulation ΔVO 0.01 0.04 %/V VI - VO = 3 to 40 V, TJ = 25°C 7
Line regulation ΔVO 0.02 0.07 %/V VI - VO = 3 to 40 V 7
Load regulation (VO ≤ 5 V) ΔVO 5 25 mV VO ≤ 5 V, IO = 10 mA to IMAX, TJ = 25°C 7
Load regulation (VO ≤ 5 V) ΔVO 20 70 mV VO ≤ 5 V, IO = 10 mA to IMAX 7
Load regulation (VO ≥ 5 V) ΔVO 0.1 0.5 % VO ≥ 5 V, IO = 10 mA to IMAX, TJ = 25°C 7
Load regulation (VO ≥ 5 V) ΔVO 0.3 1.5 % VO ≥ 5 V, IO = 10 mA to IMAX 7
Adjustment pin current IADJ 50 100 µA 7
Adjustment pin current change ΔIADJ 0.2 5 µA VI - VO = 2.5 to 40 V, IO = 10 mA to 500 mA 7
Reference voltage (between pin 3 and pin 1) VREF 1.2 1.25 1.3 V VI - VO = 2.5 to 40 V, IO = 10 mA to 500 mA, PD ≤ PMAX 7
Output voltage temperature stability ΔVO/VO 1 % 7
Minimum load current IO(min) 3.5 10 mA VI - VO = 40 V 7
Maximum load current IO(max) 1.5 2.2 A VI - VO ≤ 15 V, PD < PMAX 7
Maximum load current IO(max) 0.4 A VI - VO = 40 V, PD < PMAX, TJ = 25°C 7
Output noise voltage (percentage of VO) eN 0.003 % B = 10 Hz to 100 kHz, TJ = 25°C 7
Supply voltage rejection (CADJ = 0) SVR 65 dB TJ = 25°C, f = 120 Hz, CADJ = 0 7
Supply voltage rejection (CADJ = 10 µF) SVR 66 80 dB TJ = 25°C, f = 120 Hz, CADJ = 10 µF 7
Input-reference differential voltage VI - VO 40 V 4
Operating junction temperature (LM317) TOP 0 125 °C LM317 grade 4
Storage temperature TSTG -65 150 °C 4
Thermal resistance junction-case (D²PAK) RthJC 3 °C/W D²PAK package 4
Thermal resistance junction-ambient (D²PAK) RthJA 62.5 °C/W D²PAK package 4

CAD (KiCad official)

  • Symbol: LM317D2T-TR
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: TO-263-2 (KiCad packages3D, STEP)
  • 3D model files: lm317d2t-tr-etched.step / lm317d2t-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm317d2t-tr.step / lm317d2t-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (25 pp, sha256 6c20f995e97f5cb4, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF