component
LM311M
Public Made by Adomby adom
HGSEMI Comparators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM311M
HGSEMI · Comparators · SOP-8
LM311M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; the output can be referenced to ground, and the ground-to-VEE voltage is limited to 30 Vdc maximum. |
| 2 | IN+ | input | Non-inverting comparator input; input voltage rating is 15 Vdc with ±15V supplies and differential input voltage is limited to 30 Vdc. |
| 3 | IN- | input | Inverting comparator input; input voltage rating is 15 Vdc with ±15V supplies and differential input voltage is limited to 30 Vdc. |
| 4 | VEE | power_in | Negative supply; total VCC+VEE is limited to 36 Vdc and the output may swing up to 40 Vdc (LM311) above VEE. |
| 5 | BALANCE | passive | Offset balance pin used to trim input offset voltage. |
| 6 | BALANCE/STROBE | input | Shared balance/strobe pin; strobe voltage is limited to VCC to VCC-5 and it must not be grounded directly but driven with 3 mA to 5 mA. |
| 7 | OUTPUT | output | Open-collector output that can switch up to 40 Vdc above VEE (LM311) and sink 50 mA. |
| 8 | VCC | power_in | Positive supply; operates from a single 5V to 30V supply or ±15V dual supplies, with VCC+VEE limited to 36 Vdc. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | 2 | 7.5 | mV | RS ≤ 50 kΩ, TA = +25℃ | 4 | |
| Input offset voltage over temperature | VIO | 10 | mV | RS ≤ 50 kΩ, Tlow ≤ TA ≤ Thigh | 4 | ||
| Input offset current | IIO | 1.7 | 50 | nA | TA = +25℃ | 4 | |
| Input offset current over temperature | IIO | 70 | nA | Tlow ≤ TA ≤ Thigh | 4 | ||
| Input bias current | IIB | 45 | 250 | nA | TA = +25℃ | 4 | |
| Input bias current over temperature | IIB | 300 | nA | Tlow ≤ TA ≤ Thigh | 4 | ||
| Voltage gain | AV | 40 | 200 | V/mV | 4 | ||
| Positive supply current | ICC | 2.4 | 7.5 | mA | 4 | ||
| Negative supply current | IEE | -1.3 | -5 | mA | 4 | ||
| Total supply voltage (VCC+VEE) | VCC+VEE | 36 | Vdc | 3 | |||
| Output to negative supply voltage | VO - VEE | 40 | Vdc | 3 | |||
| Ground to negative supply voltage | VEE | 30 | Vdc | 3 | |||
| Input differential voltage | VID | 30 | Vdc | 3 | |||
| Input voltage | Vin | 15 | Vdc | 3 | |||
| Operating ambient temperature | TA | 0 | 70 | ℃ | 3 | ||
| Storage / operating junction temperature range (printed as Tstg) | Tstg | -65 | 150 | ℃ | 3 | ||
| Lead temperature (soldering) | TLEAD | 260 | ℃ | Soldering, 10 s | 3 |
CAD (KiCad official)
- Symbol:
LM311M - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
lm311m-etched.step/lm311m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm311m.step/lm311m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (10 pp, sha256
061ce243af0d55f4, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM311M
**HGSEMI** · Comparators · SOP-8
LM311M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; the output can be referenced to ground, and the ground-to-VEE voltage is limited to 30 Vdc maximum. |
| 2 | IN+ | input | Non-inverting comparator input; input voltage rating is 15 Vdc with ±15V supplies and differential input voltage is limited to 30 Vdc. |
| 3 | IN- | input | Inverting comparator input; input voltage rating is 15 Vdc with ±15V supplies and differential input voltage is limited to 30 Vdc. |
| 4 | VEE | power_in | Negative supply; total VCC+VEE is limited to 36 Vdc and the output may swing up to 40 Vdc (LM311) above VEE. |
| 5 | BALANCE | passive | Offset balance pin used to trim input offset voltage. |
| 6 | BALANCE/STROBE | input | Shared balance/strobe pin; strobe voltage is limited to VCC to VCC-5 and it must not be grounded directly but driven with 3 mA to 5 mA. |
| 7 | OUTPUT | output | Open-collector output that can switch up to 40 Vdc above VEE (LM311) and sink 50 mA. |
| 8 | VCC | power_in | Positive supply; operates from a single 5V to 30V supply or ±15V dual supplies, with VCC+VEE limited to 36 Vdc. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | | 2 | 7.5 | mV | RS ≤ 50 kΩ, TA = +25℃ | 4 |
| Input offset voltage over temperature | VIO | | | 10 | mV | RS ≤ 50 kΩ, Tlow ≤ TA ≤ Thigh | 4 |
| Input offset current | IIO | | 1.7 | 50 | nA | TA = +25℃ | 4 |
| Input offset current over temperature | IIO | | | 70 | nA | Tlow ≤ TA ≤ Thigh | 4 |
| Input bias current | IIB | | 45 | 250 | nA | TA = +25℃ | 4 |
| Input bias current over temperature | IIB | | | 300 | nA | Tlow ≤ TA ≤ Thigh | 4 |
| Voltage gain | AV | 40 | 200 | | V/mV | | 4 |
| Positive supply current | ICC | | 2.4 | 7.5 | mA | | 4 |
| Negative supply current | IEE | | -1.3 | -5 | mA | | 4 |
| Total supply voltage (VCC+VEE) | VCC+VEE | | | 36 | Vdc | | 3 |
| Output to negative supply voltage | VO - VEE | | | 40 | Vdc | | 3 |
| Ground to negative supply voltage | VEE | | | 30 | Vdc | | 3 |
| Input differential voltage | VID | | | 30 | Vdc | | 3 |
| Input voltage | Vin | | | 15 | Vdc | | 3 |
| Operating ambient temperature | TA | 0 | | 70 | ℃ | | 3 |
| Storage / operating junction temperature range (printed as Tstg) | Tstg | -65 | | 150 | ℃ | | 3 |
| Lead temperature (soldering) | TLEAD | | | 260 | ℃ | Soldering, 10 s | 3 |
## CAD (KiCad official)
- Symbol: `LM311M`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `lm311m-etched.step` / `lm311m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm311m.step` / `lm311m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758163302025711616) (10 pp, sha256 `061ce243af0d55f4`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm311m-datasheet.pdf)