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LM311DRG

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HANSCHIP semiconductor Comparators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM311DRG

HANSCHIP semiconductor · Comparators · SOP-8

LM311DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin; the output can be referenced to ground, and the ground-to-VEE voltage is limited to 30 V.
2 IN+ input Non-inverting input (the diagram marks the + input at pin 2); input voltage is rated 15 V with ±15 V supplies and differential input is limited to 30 V.
3 IN- input Inverting input (the diagram marks the - input at pin 3); input voltage is rated 15 V with ±15 V supplies and differential input is limited to 30 V.
4 VEE power_in Negative supply; total supply VCC+VEE is limited to 36 V and the output-to-VEE voltage to 40 V for the LM311.
5 BALANCE input Offset balance pin, used to trim input offset voltage.
6 BALANCE/STROBE input Shared balance and strobe pin; the strobe voltage range is VCC to VCC-5 V, and it must not be tied directly to ground but driven with 3 mA to 5 mA.
7 OUTPUT output Open-collector output that can switch up to 50 V at 50 mA and is rated at 40 V above VEE for the LM311.
8 VCC power_in Positive supply; the device operates from a single 5 V to 30 V supply or ±15 V dual supplies, with total supply limited to 36 V.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (RS ≤ 50 kΩ, TA = +25°C) VIO 2 7.5 mV RS ≤ 50 kΩ, TA = +25°C 4
Input offset voltage (RS ≤ 50 kΩ, full temperature range) VIO 10 mV RS ≤ 50 kΩ, Tlow ≤ TA ≤ Thigh 4
Input offset current (TA = +25°C) IIO 1.7 50 nA TA = +25°C 4
Input offset current (full temperature range) IIO 70 nA Tlow ≤ TA ≤ Thigh 4
Input bias current (TA = +25°C) IIB 45 250 nA TA = +25°C 4
Input bias current (full temperature range) IIB 300 nA Tlow ≤ TA ≤ Thigh 4
Voltage gain AV 40 200 V/mV 4
Input voltage range VICR -14.5 13 V Tlow ≤ TA ≤ Thigh 4
Positive supply current ICC 2.4 7.5 mA 4
Negative supply current IEE -1.3 -5 mA 4
Total supply voltage (VCC+VEE) VCC+VEE 36 Vdc TA = +25°C 3
Output to negative supply voltage VO-VEE 40 Vdc TA = +25°C 3
Ground to negative supply voltage VEE 30 Vdc TA = +25°C 3
Differential input voltage VID 30 Vdc TA = +25°C 3
Input voltage Vin 15 Vdc Note 2 (±15 V supplies) 3
Operating ambient temperature TA 0 70 ℃ LM311 variant 3
Operating junction temperature (printed label; symbol Tstg) Tstg -65 150 ℃ 3
Lead temperature (soldering) TLEAD 245 ℃ Soldering, 10 s 3

CAD (KiCad official)

  • Symbol: LM311DRG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: lm311drg-etched.step / lm311drg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm311drg.step / lm311drg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (10 pp, sha256 7086d90595913277, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF