component

LM311DR2G

Public Made by Adom

by adom

onsemi Comparators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM311DR2G

onsemi · Comparators · SOIC-8

LM311DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin of the comparator, where the output transistor emitter is returned; input polarity is reversed if it is used as an output.
2 IN+ input Comparator input (non-inverting per the standard LM311 pinout); input voltage rating is ±15 V and differential input is ±30 V.
3 IN- input Comparator input (inverting per the standard LM311 pinout); input voltage rating is ±15 V and differential input is ±30 V.
4 VEE power_in Negative supply; ground to VEE voltage is limited to 30 V and total supply VCC+
5 BALANCE passive Offset balance/trim pin that acts as an auxiliary input, so tie it to pin 6 if unused or to a trim-pot, and tie both to VCC for fastest response.
6 BALANCE/STROBE passive Offset balance and strobe pin, which must be current driven at 3.0 mA to 5.0 mA and never shorted to ground, with voltage limited to VCC to VCC-5 V.
7 OUTPUT output Open-collector style output that can switch up to 40 V (LM311) at currents to 50 mA and drive loads referenced to ground, VCC or VEE.
8 VCC power_in Positive supply for single 5.0 V to 30 V operation or split supplies, with total supply limited to 36 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VIO 2 7.5 mV RS ≤ 50 k, TA = +25°C 3
Input Offset Voltage VIO 10 mV RS ≤ 50 k, Tlow ≤ TA ≤ Thigh (LM311: 0°C to +70°C) 3
Input Offset Current IIO 1.7 50 nA TA = +25°C 3
Input Offset Current IIO 70 nA Tlow ≤ TA ≤ Thigh (LM311: 0°C to +70°C) 3
Input Bias Current IIB 45 250 nA TA = +25°C 3
Input Bias Current IIB 300 nA Tlow ≤ TA ≤ Thigh (LM311: 0°C to +70°C) 3
Voltage Gain AV 40 200 V/mV 3
Saturation Voltage VOL 0.75 1.5 V VID ≤ −10 mV, IO = 50 mA, TA = 25°C 3
Saturation Voltage VOL 0.23 0.4 V VCC ≥ 4.5 V, VEE = 0, Tlow ≤ TA ≤ Thigh; VID ≤ 10 mV, Isink ≤ 8.0 mA 3
Output Leakage Current 0.2 50 nA VID ≥ 10 mV, VO = 35 V, TA = 25°C, Istrobe = 3.0 mA 3
Input Voltage Range VICR -14.5 13 V Tlow ≤ TA ≤ Thigh (LM311: 0°C to +70°C) 3
Positive Supply Current ICC 2.4 7.5 mA 3
Negative Supply Current IEE -1.3 -5 mA 3
Total Supply Voltage VCC +/VEE/ 36 Vdc 2
Output to Negative Supply Voltage VO −VEE 40 Vdc 2
Ground to Negative Supply Voltage VEE 30 Vdc 2
Input Differential Voltage VID -30 30 Vdc 2
Input Voltage Vin -15 15 Vdc See Note 2: applies for ±15 V supplies 2
Operating Junction Temperature TJ(max) 150 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Operating Ambient Temperature Range (LM311) TA 0 70 °C 2
Single Supply Voltage 5 30 V Single-supply operation (features text; split supplies ±15 V also stated) 1

CAD (KiCad official)

  • Symbol: LM311DR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: lm311dr2g-etched.step / lm311dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm311dr2g.step / lm311dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 8ac91e9e2c9e5e78, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF