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LM3100MHX
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM3100MHX
Texas Instruments · DC-DC Converters · HTSSOP-20-EP
LM3100MHX from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N/C | unconnected | No connection; this pin must be left unconnected. |
| 2 | SW | output | Switching node internally connected to the buck switch source; connect to the output inductor. |
| 3 | SW | output | Switching node internally connected to the buck switch source; connect to the output inductor. |
| 4 | VIN | power_in | Input supply pin to the device with a nominal input range of 4.5 V to 36 V. |
| 5 | VIN | power_in | Input supply pin to the device with a nominal input range of 4.5 V to 36 V. |
| 6 | BST | passive | Bootstrap capacitor connection; connect a 0.033 µF capacitor from SW to this pin, charged by an internal diode during the high-side switch off-time. |
| 7 | GND | power_in | Analog ground for all internal circuitry other than the synchronous switches. |
| 8 | SS | passive | Soft-start pin where an internal 8 µA current source charges an external capacitor to provide the soft-start function. |
| 9 | N/C | unconnected | No connection; this pin must be left unconnected. |
| 10 | N/C | unconnected | No connection; this pin must be left unconnected. |
| 11 | TST | input | Test mode enable pin that forces the device into test mode; must be connected to ground for normal operation. |
| 12 | N/C | unconnected | No connection; this pin must be left unconnected. |
| 13 | FB | input | Feedback input internally connected to the regulation and over-voltage comparators with a 0.8 V regulation setting; connect to the feedback divider. |
| 14 | EN | input | Enable pin; connect a voltage higher than 1.26 V to enable the regulator. |
| 15 | RON | input | On-time control pin where an external resistor from VIN sets the high-side switch on-time. |
| 16 | VCC | power_out | Start-up regulator output nominally regulated to 6 V; connect a capacitor of not less than 680 nF between VCC and GND. |
| 17 | PGND | power_in | Power ground at the synchronous rectifier MOSFET source; tie to the power ground plane. |
| 18 | PGND | power_in | Power ground at the synchronous rectifier MOSFET source; tie to the power ground plane. |
| 19 | N/C | unconnected | No connection; this pin must be left unconnected. |
| 20 | N/C | unconnected | No connection; this pin must be left unconnected. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management ICs |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN, RON to GND | -0.3 | 40 | V | 4 | |||
| SW to GND | -0.3 | 40 | V | 4 | |||
| SW to GND (Transient) | -2 | V | < 100 ns | 4 | |||
| VIN to SW | -0.3 | 40 | V | 4 | |||
| BST to SW | -0.3 | 7 | V | 4 | |||
| All Other Inputs to GND | -0.3 | 7 | V | 4 | |||
| Junction Temperature | TJ | -65 | 150 | °C | 4 | ||
| Storage temperature | Tstg | 150 | °C | 4 | |||
| ESD HBM | V(ESD) | -2 | 2 | kV | Human-body model (HBM) | 4 | |
| Supply Voltage Range | VIN | 4.5 | 36 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-case thermal resistance | RθJC | 6.5 | °C/W | PWP (HTSSOP) 20 pins | 4 | ||
| VCC Output voltage | VCC | 5 | 6 | 7.2 | V | CCC = 680 nF, no load, TJ = -40°C to 125°C | 5 |
| VIN - VCC Dropout voltage | 50 | 140 | mV | ICC = 2 mA, TJ = -40°C to 125°C | 5 | ||
| VIN - VCC Dropout voltage | 350 | 570 | mV | ICC = 20 mA, TJ = -40°C to 125°C | 5 | ||
| VCC current limit | IVCCL | 40 | 65 | mA | VCC = 0 V, TJ = -40°C to 125°C | 5 | |
| VCC under-voltage lockout threshold | VCC-UVLO | 3.6 | 3.75 | 3.85 | V | VIN increasing, TJ = -40°C to 125°C | 5 |
| UVLO hysteresis | VCC-UVLO-HYS | 130 | mV | VIN decreasing | 5 | ||
| UVLO filter delay | tVCC-UVLO-D | 3 | µs | 5 | |||
| Operating current | IIN | 0.7 | 1 | mA | No switching, VFB = 1 V, TJ = -40°C to 125°C | 5 | |
| Operating current, device shutdown | IIN-SD | 17 | 30 | µA | VEN = 0 V, TJ = -40°C to 125°C | 5 | |
| Main MOSFET Rds(on) | RDS-UP-ON | 0.18 | 0.35 | Ω | TJ = -40°C to 125°C | 5 | |
| Syn. MOSFET Rds(on) | RDS-DN-ON | 0.11 | 0.2 | Ω | TJ = -40°C to 125°C | 5 | |
| Gate drive voltage UVLO | VG-UVLO | 3.3 | 4 | V | VBST - VSW increasing, TJ = -40°C to 125°C | 5 | |
| SS pin source current | ISS | 6 | 8 | 9.8 | µA | VSS = 0.5 V, TJ = -40°C to 125°C | 5 |
| Syn. MOSFET current limit threshold | ICL | 1.9 | A | 5 | |||
| ON timer pulse width | tON | 1.38 | µs | VIN = 10 V, RON = 100 kΩ | 5 | ||
| ON timer pulse width | tON | 0.47 | µs | VIN = 30 V, RON = 100 kΩ | 5 | ||
| ON timer minimum pulse width | tON-MIN | 200 | ns | 5 | |||
| OFF timer pulse width | tOFF | 260 | ns | 5 | |||
| EN Pin input threshold | VEN | 1.236 | 1.26 | 1.285 | V | VEN rising, TJ = -40°C to 125°C | 5 |
| Enable threshold hysteresis | VEN-HYS | 90 | mV | VEN falling | 5 | ||
| In-regulation feedback voltage | VFB | 0.784 | 0.8 | 0.816 | V | VSS ≥ 0.8 V, TJ = -40°C to 125°C | 5 |
| In-regulation feedback voltage | VFB | 0.788 | 0.812 | V | VSS ≥ 0.8 V, TJ = -40°C to 125°C | 5 | |
| Feedback over-voltage threshold | VFB-OV | 0.894 | 0.92 | 0.94 | V | TJ = -40°C to 125°C | 5 |
| Feedback input current | IFB | 5 | 100 | nA | TJ = -40°C to 125°C | 5 | |
| Thermal shutdown temperature | TSD | 165 | °C | TJ rising | 5 | ||
| Thermal shutdown temperature hysteresis | TSD-HYS | 20 | °C | TJ falling | 5 |
CAD (KiCad official)
- Symbol:
LM3100MHX - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
lm3100mhx-etched.step/lm3100mhx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm3100mhx.step/lm3100mhx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
0b3a1e5eb905b98b, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).