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LM2931AD50R

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STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)lm2931ad50r
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docs lm2931ad50r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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lm2931ad50r-etched.fit.json lm2931ad50r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lm2931ad50r-etched.glb lm2931ad50r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lm2931ad50r-etched.step lm2931ad50r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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page.json lm2931ad50r: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 25d ago
README.md lm2931ad50r: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 25d ago

LM2931AD50R

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

LM2931AD50R from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated 5.0 V output. Typical 5.0 V (min 4.75 V, max 5.25 V) at IO = 100 mA over the full VI = 6 to 26 V and TJ = -40 to 125 °C range. Requires a ≥100 µF output capacitor for stability.
2 GND power_in Device ground / reference return.
3 GND power_in Device ground / reference return (tied internally to the other GND pins; multiple GND pins aid heat sinking on SO-8).
4 NC unconnected Not connected on the fixed-output version (LM2931AD50R). This pin serves as the ADJ feedback input only on the adjustable (LM2931D-R) variant; leave floating on this part.
5 INHIBIT input Active-high shutdown / inhibit logic input. Regulator is enabled when VINH < 1.2 V (VIL) and disabled when VINH > 3.25 V (VIH). Inhibit input current IINH ≈ 22 µA typ (50 µA max) at VINH = 2.5 V. Absolute maximum inhibit input voltage is 40 V.
6 GND power_in Device ground / reference return (tied internally to the other GND pins).
7 GND power_in Device ground / reference return (tied internally to the other GND pins).
8 VIN power_in Unregulated supply input. Recommended operating range 6 V to 26 V (max operating 26 V min); tolerates transient input up to 60 V (T < 100 ms) and reverse polarity down to -15 V DC / -50 V transient. Decouple with a 0.1 µF input capacitor. Absolute maximum DC input voltage 40 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • LM2931AD50R
  • LM2931AD33R
  • LM2931D-R
  • LM2931ADT50R
  • LM2931ADT50RY
  • LM2931ADT33RY
  • LM2931AZ50R

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum operating input voltage VI 26 V IO = 10 mA, TJ = -40 to 125 °C 7
Output voltage VO 4.81 5 5.19 V 7
Output voltage VO 4.75 5 5.25 V IO = 100 mA, VI = 6 to 26 V, TJ = -40 to 125°C 7
Line regulation DVO 2 10 mV VI = 9 to 16 V 7
Line regulation DVO 4 30 mV VI = 6 to 26 V 7
Load regulation DVO 15 50 mV IO = 5 to 100 mA 7
Dropout voltage Vd 90 200 mV IO = 10 mA 7
Dropout voltage Vd 250 600 mV IO = 100 mA 7
Quiescent current ON MODE Id 2.5 30 mA ON MODE IO = 100 mA 7
Quiescent current OFF MODE Id 0.3 1 mA OFF MODE VINH = 2.5 V, RLOAD = 500 Ω 7
Short circuit current ISC 100 300 mA 7
Supply voltage rejection SVR 55 75 dB IO = 100 mA, VI = 14 ± 2 V, f = 120 Hz 7
Control input voltage low VIL 1.2 V TJ = -40 to 125 °C 7
Control input voltage high VIH 2 3.25 V TJ = -40 to 125 °C 7
Inhibit input current IINH 22 50 µA VINH = 2.5 V 7
Transient input voltage VI 60 70 V RLOAD = 500 Ω, Ƭ < 100 ms 7
Reverse polarity input voltage VI -50 -15 V VO = ± 0.3 V, RLOAD = 500 Ω 7
Reverse polarity input voltage transient VI -50 V RLOAD = 500 Ω, Ƭ < 100 ms 7
Output noise voltage eN 500 µVRMS B = 10 Hz to 100 kHz 7
DC positive input voltage VI 40 V 4
DC reverse input voltage VI -15 V 4
Transient input voltage VI 60 V Ƭ < 100 ms 4
Transient reverse input voltage VI -50 V Ƭ < 100 ms 4
Inhibit input voltage VINH 40 V 4
Storage temperature range TSTG -65 150 °C 4
Operating junction temperature range TOP -40 125 °C 4
Thermal resistance junction-case (SO-8) RthJC 20 °C/W 4
Thermal resistance junction-ambient (SO-8) RthJA 55 °C/W Note (1): considering 6 cm2 of copper board heat-sink 4

CAD (KiCad official)

  • Symbol: LM2931AD50R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: lm2931ad50r-etched.step / lm2931ad50r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm2931ad50r.step / lm2931ad50r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 07bd8d19d77c6060, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF