component

LM2842YQMK

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, TSOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)lm2842yqmkfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 13h ago
viewers lm2842yqmk: viewers · Ray 13h ago
lm2842yqmk-etched.glb lm2842yqmk: factory component page (tier=lcsc) · Ray 13h ago
lm2842yqmk-etched.step lm2842yqmk: factory component page (tier=lcsc) · Ray 13h ago
lm2842yqmk-hero.glb lm2842yqmk: hero GLB from the etched model (keeps the MPN mark) · Ray 10h ago
lm2842yqmk-hero.overlay.json Publish 0.1.0 · Ray 13h ago
lm2842yqmk.glb Publish 0.1.0 · Ray 13h ago
lm2842yqmk.kicad_mod Publish 0.1.0 · Ray 13h ago
lm2842yqmk.kicad_sym Publish 0.1.0 · Ray 13h ago
lm2842yqmk.lbr Publish 0.1.0 · Ray 13h ago
lm2842yqmk.step Publish 0.1.0 · Ray 13h ago
package.json Publish 0.1.0 · Ray 13h ago
page.json Set visibility: public · Ray 13h ago
README.md Initial commit: component/lm2842yqmk · Ray 13h ago

LM2842YQMK

Texas Instruments · DC-DC Converters · TSOT-23-6L

LM2842YQMK from Texas Instruments, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB input SW FET gate bias voltage; connect the CBOOT capacitor between CB and SW, and the datasheet limits CB voltage above SW to 7 V maximum.
2 GND power_in Ground connection for the regulator.
3 FB input Feedback pin set by the divider VOUT = VFB(1 + R1/R2) with VFB = 0.765 V; resistors must be 100 Ω to 10 kΩ to avoid input bias errors, and FB is rated −0.3 V to 5 V.
4 SHDN input Logic-level shutdown input: pull to GND to disable and high to enable (about 2.3 V or higher logic signals), tie to VIN if unused, and do not let it float; the maximum voltage should not exceed 42 V.
5 VIN power_in Power input voltage pin with a 4.5 V to 42 V normal operating range (absolute maximum −0.3 V to 45 V).
6 SW output Power FET output that connects to the inductor, the catch diode and the CBOOT capacitor; SW voltage is rated up to 42 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSOT-23-6L
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: LM2842YQMK
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: lm2842yqmk-etched.step / lm2842yqmk-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm2842yqmk.step / lm2842yqmk.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 9b519afa4d0599ef, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF