main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 29d ago
viewers lm2674n-3-3: viewers · Ray 29d ago
lm2674n-3-3-etched.glb lm2674n-3-3: factory component page (tier=lcsc) · Ray 29d ago
lm2674n-3-3-etched.step lm2674n-3-3: factory component page (tier=lcsc) · Ray 29d ago
lm2674n-3-3-hero.glb lm2674n-3-3: hero GLB from the etched model (keeps the MPN mark) · Ray 29d ago
lm2674n-3-3-hero.overlay.json Publish 0.1.0 · Ray 29d ago
lm2674n-3-3.glb Publish 0.1.0 · Ray 29d ago
lm2674n-3-3.kicad_mod Publish 0.1.0 · Ray 29d ago
lm2674n-3-3.kicad_sym Publish 0.1.0 · Ray 29d ago
lm2674n-3-3.lbr Publish 0.1.0 · Ray 29d ago
lm2674n-3-3.step Publish 0.1.0 · Ray 29d ago
package.json Publish 0.1.0 · Ray 29d ago
page.json Set visibility: public · Ray 29d ago
README.md Publish 0.1.0 · Ray 29d ago

LM2674N-3.3

Texas Instruments · DC-DC Converters · PDIP-8

LM2674N-3.3 from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB input Bootstrap capacitor connection for the high-side driver; a 10nF quality capacitor is to be connected between the CB pin and the VSW pin.
2 NC unconnected No internal connection; leave this pin unconnected.
3 NC unconnected No internal connection; leave this pin unconnected.
4 FB input Feedback sense input; for the fixed 3.3V output it connects directly to the output capacitor, and it must never be shorted to ground while the regulator is enabled (feedback pin voltage absolute maximum -0.3V to 14V).
5 ON/OFF input Enable input where high enables the regulator and low disables it; the pin must be pulled high or left floating to run, the off-mode threshold is below 1.4V, and it is internally pulled up to 7V (absolute maximum -0.1V to 6V).
6 GND power_in Power ground pin connected to system ground and to the CIN and COUT ground returns, with the CIN ground connection kept as short as possible.
7 VIN power_in Power input to the high-side FET, connected to the supply and the input bypass capacitor CIN, with the VIN-to-CIN-to-GND path kept as short as possible; recommended supply range is 6.5V to 40V.
8 VSW output Source of the internal high-side FET forming the switch node, connected to the inductor and the external diode cathode; switch voltage to ground is limited to -1V minimum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: LM2674N-3.3
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: lm2674n-3-3-etched.step / lm2674n-3-3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm2674n-3-3.step / lm2674n-3-3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 a9cee9aefd8786a1, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF