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LM26420Q0XMH
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Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# LM26420Q0XMH++**Texas Instruments** · DC-DC Converters · HTSSOP-20-EP++LM26420Q0XMH from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VINC | power_in | Supply for the control circuit and the high- and low-side gate drivers; it must not be lower than VIND1,2 - VTH, and an RC filter to AGND (RF typically 1 to 10 ohm, CF 0.22 to 1 uF in X7R/X5R) is recommended. |+| 2 | EN1 | input | Enable input for buck converter 1 with logic-high enable (threshold about 1.04 V with 150 mV hysteresis); do not leave it floating or drive it above VIN + 0.3 V. |+| 3 | VIND1 | power_in | Input power supply for buck converter 1, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin. |+| 4 | VIND1 | power_in | Input power supply for buck converter 1, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin. |+| 5 | SW1 | power_out | Output switch node of buck converter 1 that connects to the inductor; absolute maximum voltage is -0.5 V to 7 V. |+| 6 | PGND1 | power_in | Power ground for buck converter 1, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias. |+| 7 | PGND1 | power_in | Power ground for buck converter 1, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias. |+| 8 | FB1 | input | Feedback input for buck converter 1 from the external resistor divider that sets VOUT (VREF 0.8 V, absolute maximum -0.5 V to 3 V); keep this high-impedance trace short. |+| 9 | PG1 | output | Open-drain power-good output for buck converter 1 that requires an external pull-up resistor (10 kohm to 100 kohm, 50 kohm recommended) and is high when FB is within the power-good window. |+| 10 | DAP | passive | Die attach pad connection that should be tied to system ground for low thermal impedance, but this pin cannot be used as the main GND connection. |+| 11 | DAP | passive | Die attach pad connection that should be tied to system ground for low thermal impedance, but this pin cannot be used as the main GND connection. |+| 12 | PG2 | output | Open-drain power-good output for buck converter 2 that requires an external pull-up resistor (10 kohm to 100 kohm) and is high when FB2 is within the power-good window. |+| 13 | FB2 | input | Feedback input for buck converter 2 from the external resistor divider that sets VOUT (VREF 0.8 V, absolute maximum -0.5 V to 3 V); keep this high-impedance trace short. |+| 14 | PGND2 | power_in | Power ground for buck converter 2, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias. |+| 15 | PGND2 | power_in | Power ground for buck converter 2, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias. |+| 16 | SW2 | power_out | Output switch node of buck converter 2 that connects to the inductor; absolute maximum voltage is -0.5 V to 7 V. |+| 17 | VIND2 | power_in | Input power supply for buck converter 2, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin. |+| 18 | VIND2 | power_in | Input power supply for buck converter 2, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin. |+| 19 | EN2 | input | Enable input for buck converter 2 with logic-high enable (threshold about 1.04 V with 150 mV hysteresis); do not leave it floating or drive it above VIN + 0.3 V. |+| 20 | AGND | power_in | Signal ground; the bottom resistor of the feedback network should be placed as close as possible to this pin. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `LM26420Q0XMH`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm26420q0xmh-etched.step` / `lm26420q0xmh-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm26420q0xmh.step` / `lm26420q0xmh.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm26420-q1) (47 pp, sha256 `b25d3310c3924b09`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm26420q0xmh-datasheet.pdf)
page.jsonadded+277@@ -0,0 +1,277 @@+{+ "slug": "lm26420q0xmh",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm26420q0xmh",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm26420q0xmh.kicad_sym",+ "lm26420q0xmh.kicad_mod",+ "lm26420q0xmh.glb",+ "lm26420q0xmh.step",+ "lm26420q0xmh.lbr",+ "docs/hero.png",+ "docs/lm26420q0xmh-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm26420q0xmh-hero.glb",+ "lm26420q0xmh-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM26420Q0XMH",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-20-EP",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm26420-q1",+ "parts": {+ "symbol": "lm26420q0xmh.kicad_sym",+ "footprint": "lm26420q0xmh.kicad_mod",+ "model_3d": "lm26420q0xmh-hero.glb",+ "model_3d_plain": "lm26420q0xmh.glb",+ "model_3d_step": "lm26420q0xmh-etched.step",+ "model_3d_step_plain": "lm26420q0xmh.step",+ "lbr": "lm26420q0xmh.lbr"+ },+ "distributor_links": {+ "lcsc": "C2879361"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:02:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VINC",+ "type": "power_in",+ "description": "Supply for the control circuit and the high- and low-side gate drivers; it must not be lower than VIND1,2 - VTH, and an RC filter to AGND (RF typically 1 to 10 ohm, CF 0.22 to 1 uF in X7R/X5R) is recommended."+ },+ {+ "number": "2",+ "name": "EN1",+ "type": "input",+ "description": "Enable input for buck converter 1 with logic-high enable (threshold about 1.04 V with 150 mV hysteresis); do not leave it floating or drive it above VIN + 0.3 V."+ },+ {+ "number": "3",+ "name": "VIND1",+ "type": "power_in",+ "description": "Input power supply for buck converter 1, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin."+ },+ {+ "number": "4",+ "name": "VIND1",+ "type": "power_in",+ "description": "Input power supply for buck converter 1, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin."+ },+ {+ "number": "5",+ "name": "SW1",+ "type": "power_out",+ "description": "Output switch node of buck converter 1 that connects to the inductor; absolute maximum voltage is -0.5 V to 7 V."+ },+ {+ "number": "6",+ "name": "PGND1",+ "type": "power_in",+ "description": "Power ground for buck converter 1, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias."+ },+ {+ "number": "7",+ "name": "PGND1",+ "type": "power_in",+ "description": "Power ground for buck converter 1, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias."+ },+ {+ "number": "8",+ "name": "FB1",+ "type": "input",+ "description": "Feedback input for buck converter 1 from the external resistor divider that sets VOUT (VREF 0.8 V, absolute maximum -0.5 V to 3 V); keep this high-impedance trace short."+ },+ {+ "number": "9",+ "name": "PG1",+ "type": "output",+ "description": "Open-drain power-good output for buck converter 1 that requires an external pull-up resistor (10 kohm to 100 kohm, 50 kohm recommended) and is high when FB is within the power-good window."+ },+ {+ "number": "10",+ "name": "DAP",+ "type": "passive",+ "description": "Die attach pad connection that should be tied to system ground for low thermal impedance, but this pin cannot be used as the main GND connection."+ },+ {+ "number": "11",+ "name": "DAP",+ "type": "passive",+ "description": "Die attach pad connection that should be tied to system ground for low thermal impedance, but this pin cannot be used as the main GND connection."+ },+ {+ "number": "12",+ "name": "PG2",+ "type": "output",+ "description": "Open-drain power-good output for buck converter 2 that requires an external pull-up resistor (10 kohm to 100 kohm) and is high when FB2 is within the power-good window."+ },+ {+ "number": "13",+ "name": "FB2",+ "type": "input",+ "description": "Feedback input for buck converter 2 from the external resistor divider that sets VOUT (VREF 0.8 V, absolute maximum -0.5 V to 3 V); keep this high-impedance trace short."+ },+ {+ "number": "14",+ "name": "PGND2",+ "type": "power_in",+ "description": "Power ground for buck converter 2, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias."+ },+ {+ "number": "15",+ "name": "PGND2",+ "type": "power_in",+ "description": "Power ground for buck converter 2, which should be kept close to the input capacitor ground and tied to the ground plane with at least two vias."+ },+ {+ "number": "16",+ "name": "SW2",+ "type": "power_out",+ "description": "Output switch node of buck converter 2 that connects to the inductor; absolute maximum voltage is -0.5 V to 7 V."+ },+ {+ "number": "17",+ "name": "VIND2",+ "type": "power_in",+ "description": "Input power supply for buck converter 2, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin."+ },+ {+ "number": "18",+ "name": "VIND2",+ "type": "power_in",+ "description": "Input power supply for buck converter 2, operating over 3 V to 5.5 V with an absolute maximum of 7 V; place at least one 10 uF X7R/X5R ceramic capacitor next to each VIND pin."+ },+ {+ "number": "19",+ "name": "EN2",+ "type": "input",+ "description": "Enable input for buck converter 2 with logic-high enable (threshold about 1.04 V with 150 mV hysteresis); do not leave it floating or drive it above VIN + 0.3 V."+ },+ {+ "number": "20",+ "name": "AGND",+ "type": "power_in",+ "description": "Signal ground; the bottom resistor of the feedback network should be placed as close as possible to this pin."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The HTSSOP-20 pinout is taken from Table 4-2 (page 4). Figure 4-2 is not machine-readable, so pin po; The datasheet lists pins 10, 11 and DAP together as one row. The exposed pad has no separate number,; Table 4-2 types PG1 and PG2 as G (ground). Functionally they are open-drain power-good outputs per S",+ "exposed pad 21 added from the footprint",+ "2/21 pins cited to the wrong page (name found elsewhere): ['10:DAP@p4', '11:DAP@p4']"+ ],+ "pages_sent": 28,+ "cost_usd": 0.143,+ "at": "2026-10-08T18:01:38"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm26420-q1",+ "pages": 47,+ "sha256": "b25d3310c3924b09",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lm26420q0xmh.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "78d9c55cdb2c2f30f2b4f5ba6ab38fe59a6274b086f5ef7522b97dc620c1e80e",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lm26420q0xmh-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "1ee23298b452f13979652413c9ad2d3350cae383f9059452778d3bc92e04d9b2",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}