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LM26001MXAX
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Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM26001MXAX
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
LM26001MXAX from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply input; the device has a 4.0 V to 38 V continuous input range, with operation down to 3 V during line transients. |
| 2 | VIN | power_in | Power supply input; the device has a 4.0 V to 38 V continuous input range, with operation down to 3 V during line transients. |
| 3 | PGOOD | output | Open-drain power good output that goes high when the output voltage is greater than 92% of nominal. |
| 4 | EN | input | Analog level enable input; when pulled below 0.8 V the device enters shutdown mode. |
| 5 | SS | passive | Soft-start pin; connect a capacitor from this pin to GND to set the soft-start time. |
| 6 | COMP | passive | Compensation pin; connect to a resistor-capacitor pair to compensate the control loop. |
| 7 | FB | input | Feedback pin; connect to a resistor divider between VOUT and GND to set the output voltage. |
| 8 | GND | power_in | Ground pin. |
| 9 | FREQ | passive | Frequency adjust pin; connect a resistor from this pin to GND to set the operating frequency, adjustable from 150 kHz to 500 kHz. |
| 10 | FPWM | input | Logic-level input; connect to GND for normal operation, and when pulled high the sleep mode operation is disabled (forced PWM). |
| 11 | SYNC | input | Frequency synchronization pin; connect to an external clock for synchronized operation and pull low for non-synchronized operation. |
| 12 | VBIAS | power_in | Connect to an external 3-V or greater supply to bypass the internal regulator for improved efficiency; tie to GND if not used. |
| 13 | VDD | power_out | Output of the internal regulator; bypass with a minimum 1.0-µF capacitor. |
| 14 | BOOT | passive | Bootstrap capacitor pin; connect a 0.1-µF minimum ceramic capacitor from this pin to SW to generate the gate drive bootstrap voltage. |
| 15 | SW | passive | Switch pin; the source of the internal N-channel switch, with an absolute maximum DC rating of -0.5 V to 40 V. |
| 16 | SW | passive | Switch pin; the source of the internal N-channel switch, with an absolute maximum DC rating of -0.5 V to 40 V. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
LM26001MXAX - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
lm26001mxax-etched.step/lm26001mxax-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm26001mxax.step/lm26001mxax.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
c66567a112219e16, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM26001MXAX
**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP
LM26001MXAX from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply input; the device has a 4.0 V to 38 V continuous input range, with operation down to 3 V during line transients. |
| 2 | VIN | power_in | Power supply input; the device has a 4.0 V to 38 V continuous input range, with operation down to 3 V during line transients. |
| 3 | PGOOD | output | Open-drain power good output that goes high when the output voltage is greater than 92% of nominal. |
| 4 | EN | input | Analog level enable input; when pulled below 0.8 V the device enters shutdown mode. |
| 5 | SS | passive | Soft-start pin; connect a capacitor from this pin to GND to set the soft-start time. |
| 6 | COMP | passive | Compensation pin; connect to a resistor-capacitor pair to compensate the control loop. |
| 7 | FB | input | Feedback pin; connect to a resistor divider between VOUT and GND to set the output voltage. |
| 8 | GND | power_in | Ground pin. |
| 9 | FREQ | passive | Frequency adjust pin; connect a resistor from this pin to GND to set the operating frequency, adjustable from 150 kHz to 500 kHz. |
| 10 | FPWM | input | Logic-level input; connect to GND for normal operation, and when pulled high the sleep mode operation is disabled (forced PWM). |
| 11 | SYNC | input | Frequency synchronization pin; connect to an external clock for synchronized operation and pull low for non-synchronized operation. |
| 12 | VBIAS | power_in | Connect to an external 3-V or greater supply to bypass the internal regulator for improved efficiency; tie to GND if not used. |
| 13 | VDD | power_out | Output of the internal regulator; bypass with a minimum 1.0-µF capacitor. |
| 14 | BOOT | passive | Bootstrap capacitor pin; connect a 0.1-µF minimum ceramic capacitor from this pin to SW to generate the gate drive bootstrap voltage. |
| 15 | SW | passive | Switch pin; the source of the internal N-channel switch, with an absolute maximum DC rating of -0.5 V to 40 V. |
| 16 | SW | passive | Switch pin; the source of the internal N-channel switch, with an absolute maximum DC rating of -0.5 V to 40 V. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
## CAD (KiCad official)
- Symbol: `LM26001MXAX`
- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`
- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files: `lm26001mxax-etched.step` / `lm26001mxax-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm26001mxax.step` / `lm26001mxax.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm26001-q1) (34 pp, sha256 `c66567a112219e16`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm26001mxax-datasheet.pdf)