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docs lm2596dp-5-0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
lm2596dp-5-0-etched.fit.json lm2596dp-5-0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lm2596dp-5-0-etched.glb lm2596dp-5-0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lm2596dp-5-0-etched.step lm2596dp-5-0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lm2596dp-5-0.glb Publish 0.1.0 · Ray
lm2596dp-5-0.kicad_mod fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm (symbol has pins 1,2,3,4,5,6,7,8,9;… · Ray
lm2596dp-5-0.kicad_sym Publish 0.1.0 · Ray
lm2596dp-5-0.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
lm2596dp-5-0.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm (symbol has pins 1,2,3,4,5,6,7,8,9;… · Ray
page.json lm2596dp-5-0: specified limits as data (metadata.characteristics, 25 rows from the datasheet) · Ray
README.md lm2596dp-5-0: specified limits as data (metadata.characteristics, 25 rows from the datasheet) · Ray

LM2596DP-5.0

HTC Korea TAEJIN Tech · DC-DC Converters · SOP-8-EP

LM2596DP-5.0 from HTC Korea TAEJIN Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Positive input supply for the LM2596 step-down switching regulator. Absolute maximum 45V, operational up to 40V. Requires a suitable input bypass capacitor (typ. 470 uF, 50V) close to the pin to minimize voltage transients and supply switching currents.
2 VOUT output Emitter of the internal 3A switch transistor (switch node). Saturation voltage Vsat is typically 1.16 V at 3A. Connects to the external catch diode and buck inductor. PCB area at this node should be minimized to reduce switching noise coupling.
3 GND power_in Circuit ground pin. Exposed pad of the SOP-8PP package must also be externally connected to GND for thermal and electrical grounding.
4 FEEDBACK input Senses the regulated output voltage to close the feedback loop. In the fixed 5.0V version, the internal resistor divider (R2, R1) drives the internal error amplifier's non-inverting input; connect this pin directly to the +5.0V output rail.
5 ON/OFF input TTL-compatible shutdown input. Threshold is typically 1.3 V; driving above threshold (up to +Vin) shuts the regulator off, dropping supply current to ~80 uA standby. Pulling below 1.3 V or leaving open enables the regulator (on state).
6 NC unconnected No connect. Leave unconnected.
7 NC unconnected No connect. Leave unconnected.
8 NC unconnected No connect. Leave unconnected.
9 EP power_in Exposed thermal pad on the underside of the SOP8-PP package. Must be externally connected to GND for both thermal dissipation and electrical grounding.

Key specifications

Parameter Value
Manufacturer HTC Korea TAEJIN Tech
Package SOP-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • LM2596DP-5.0
  • LM2596T-5.0
  • LM2596R-5.0

The extractor listed these alongside LM2596DP-5.0, but they are different parts with different electrical characteristics. Do not order them as substitutes.

  • LM2596DP-3.3
  • LM2596DP-12
  • LM2596DP-ADJ
  • LM2596T-3.3
  • LM2596T-12
  • LM2596T-ADJ
  • LM2596R-3.3
  • LM2596R-12
  • LM2596R-ADJ

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage (Vin=12V, ILOAD=0.5A, TJ=25℃) Vout 4.9 5 5.1 V Vin=12V, ILOAD=0.5A, TJ=25℃ 5
Output Voltage (8.0V≤Vin≤40V, 0.5A≤ILOAD≤3.0A), TJ=25℃ Vout 4.8 5 5.2 V 8.0V≤Vin≤40V, 0.5A≤ILOAD≤3.0A, TJ=25℃ 5
Output Voltage (8.0V≤Vin≤40V, 0.5A≤ILOAD≤3.0A), TJ=-40℃ ~ +125℃ Vout 4.75 5.25 V 8.0V≤Vin≤40V, 0.5A≤ILOAD≤3.0A, TJ=-40℃ ~ +125℃ 5
Oscillator Frequency, TJ=25℃ Fosc 127 150 173 kHz TJ=25℃ 6
Oscillator Frequency, TJ=0 ~ +125℃ Fosc 110 173 kHz TJ=0 ~ +125℃ 6
Saturation Voltage (Iout=3.0A), TJ=25℃ Vsat 1.16 1.4 V Iout=3.0A, TJ=25℃ 6
Saturation Voltage (Iout=3.0A), TJ=0 ~ +125℃ Vsat 1.5 V Iout=3.0A, TJ=0 ~ +125℃ 6
Current Limit (Peak Current), TJ=25℃ ICL 3.6 4.5 6.9 A TJ=25℃ 6
Current Limit (Peak Current), TJ=0 ~ +125℃ ICL 3.4 7.5 A TJ=0 ~ +125℃ 6
Output Leakage Current, Output = 0V IL 25 µA Output = 0V, TJ=25℃ 6
Output Leakage Current, Output = -1.0V IL 2 10 mA Output = -1.0V, TJ=25℃ 6
Quiescent Current, TJ=0 ~ +125℃ IQ 10 mA TJ=0 ~ +125℃ 6
Standby Quiescent Current (ON/OFF Pin = 5.0V (off)), TJ=25℃ ISTBY 80 200 µA ON/OFF Pin = 5.0V ("off"), TJ=25℃ 6
Standby Quiescent Current (ON/OFF Pin = 5.0V (off)), TJ=0 ~ +125℃ ISTBY 250 µA ON/OFF Pin = 5.0V ("off"), TJ=0 ~ +125℃ 6
ON/OFF Pin Logic Input Level (high), TJ=25℃ VIH 2 1.3 V Vout=0V, TJ=25℃ 6
ON/OFF Pin Logic Input Level (high), TJ=0 ~ +125℃ VIH 2 V Vout=0V, TJ=0 ~ +125℃ 6
ON/OFF Pin Logic Input Level (low), TJ=25℃ VIL 1.3 0.6 V Vout=Nominal Output Voltage, TJ=25℃ 6
ON/OFF Pin Logic Input Level (low), TJ=0 ~ +125℃ VIL 0.6 V Vout=Nominal Output Voltage, TJ=0 ~ +125℃ 6
ON/OFF Pin Input Current (Regulator OFF) IIH 5 15 µA VLOGIC = 2.5V (Regulator OFF) 6
ON/OFF Pin Input Current (Regulator ON) IIL 0.02 5 VLOGIC = 0.5V (Regulator ON) 6
Maximum Supply Voltage Vin 45 V 4
On/Off Pin Input Voltage -0.3 V Range -0.3V ≤ V ≤ +Vin as printed; upper limit is +Vin (non-numeric, left null) 4
Output Voltage to Ground (Steady-State) -1 V 4
Operating Junction Temperature Range TJ -40 125 ℃ 5
Supply Voltage Vin 40 V 5

CAD (KiCad official)

  • Symbol: LM2596DP-5.0
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: lm2596dp-5-0-etched.step / lm2596dp-5-0-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm2596dp-5-0.step / lm2596dp-5-0.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lm2596dp-5-0.step 122 KB You want the bare part, or you mark your own boards.
lm2596dp-5-0-etched.step 2.3 MB You want the part with LM2596DP-5.0 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 567 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTC Korea TAEJIN Tech datasheet (10 pp, sha256 3a288026e0f41aae, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF