component
LM25117PMHX
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM25117PMHX
Texas Instruments · DC-DC Converters · HTSSOP-20-EP
LM25117PMHX from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UVLO | input | Under-voltage lockout programming pin; regulator enters shutdown mode below 0.4V, standby mode between 0.4V and 1.25V, or normal operation above 1.25V threshold. |
| 2 | DEMB | input | Diode emulation mode control input; pull low or leave floating to enable diode emulation with reverse current blocking, or pull high to disable continuous conduction. |
| 3 | RES | input | Restart timer capacitor pin for discontinuous mode current limiting; determines restart delay after 256 consecutive PWM cycles of current limiting. |
| 4 | SS | input | Soft-start capacitor connection charged by internal 10µA sink current; controls error amplifier reference voltage ramp slope during startup sequence. |
| 5 | RT | input | Oscillator timing pin connected to external resistor to program switching frequency (50kHz to 750kHz) or AC-coupled to external clock for synchronization. |
| 6 | AGND | power_in | Analog ground return path for internal 0.8V reference circuit and all analog circuit grounds. |
| 7 | VCCDIS | input | VCC regulator disable control input; internal regulator disabled when voltage exceeds 1.25V threshold to enable external bias supply operation. |
| 8 | FB | input | Feedback input to inverting terminal of error amplifier; adjustable reference threshold is 0.8V, receives output voltage divider signal for regulation. |
| 9 | COMP | output | Error amplifier output; connects to feedback compensation network (RCOMP, CCOMP, CHF) and PWM comparator for loop compensation. |
| 10 | CM | output | Current monitor output providing average inductor current information; output gain 20.5V/V typical, bandwidth approximately fSW/10. |
| 11 | RAMP | output | PWM ramp signal output for slope compensation; external RRAMP (SW to RAMP) and CRAMP (RAMP to AGND) set inductor current slope compensation. |
| 12 | CS | input | Current sense amplifier input connected to high-side of external current sense resistor; detects peak inductor current for cycle-by-cycle limiting. |
| 13 | CSG | input | Kelvin return connection to current sense resistor low-side; must be directly connected to low-side of sense resistor for accurate current measurement. |
| 14 | PGND | power_in | Power ground return for low-side NMOS gate driver; direct connection to low-side MOSFET source and current sense resistor low-side. |
| 15 | LO | output | Low-side NMOS gate driver output; drives external low-side synchronous MOSFET gate via short low-inductance path, peak current ±3.3A. |
| 16 | VCC | power_in | Bias supply voltage input regulated to 7.6V; decoupled with 0.47µF to 10µF capacitor placed close to IC for gate driver and logic supply. |
| 17 | SW | output | Buck regulator switch node connecting high-side MOSFET source, low-side MOSFET drain, bootstrap capacitor, and serving as ramp voltage reference. |
| 18 | HO | output | High-side NMOS gate driver output; drives external high-side MOSFET gate via short low-inductance path, peak current ±3.3A, voltage swing from SW to HB. |
| 19 | HB | power_out | Bootstrap power supply for high-side gate driver; connected to bootstrap capacitor (≥0.1µF) and external bootstrap diode cathode. |
| 20 | VIN | power_in | VCC regulator power supply input accepting 4.5V to 42V; provides internal bias regulation and high-voltage startup current source. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
LM25117PMHX - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
lm25117pmhx-etched.step/lm25117pmhx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm25117pmhx.step/lm25117pmhx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
ebaf723e350b87ed, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).