component
LM25069PMMX-2
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM25069PMMX-2
Texas Instruments · Surge Protection Devices (SPDs) · VSSOP-10-0.5mm
LM25069PMMX-2 from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SENSE | input | Current sense input: the voltage across the current sense resistor (RS) is measured from VIN to this pin, and if it reaches 50mV the load current is limited and the fault timer activates. |
| 2 | VIN | power_in | Positive supply input; a small ceramic bypass capacitor close to this pin is recommended to suppress transients when the load current is switched off. |
| 3 | UVLO/EN | input | Under-voltage lockout and enable input: an external resistor divider from the system input sets the turn-on threshold, an internal 20 µA source gives hysteresis, the enable threshold is 1.17V, and the pin can be used for remote shutdown. |
| 4 | OVLO | input | Over-voltage lockout input: an external resistor divider from the system input sets the turn-off threshold, an internal 20 µA source gives hysteresis, and the disable threshold at the pin is 1.16V. |
| 5 | GND | power_in | Circuit ground. |
| 6 | TIMER | passive | Timing capacitor pin: the external capacitor sets the insertion time delay and the fault timeout period, and also sets the restart timing of the LM25069-2. |
| 7 | PWR | input | Power limit set: an external resistor on this pin, together with the current sense resistor (RS), sets the maximum power dissipation allowed in the external series pass MOSFET. |
| 8 | PGD | output | Power Good open-drain output: it is active (high) when the external MOSFET VDS decreases below 1.3V and switches low when VDS increases above 1.9V. |
| 9 | OUT | input | Output feedback: connect to the output rail (external MOSFET source), used internally to determine MOSFET VDS for power limiting and to control the PGD indicator. |
| 10 | GATE | output | Gate drive output: connect to the external MOSFET gate; this pin's voltage is limited to 19.5V above ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Circuit Protection |
| Pins | 10 |
CAD (KiCad official)
- Symbol:
LM25069PMMX-2 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
lm25069pmmx-2-etched.step/lm25069pmmx-2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm25069pmmx-2.step/lm25069pmmx-2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
ed81a1b21e4ba208, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).