component
LM25069PMME-2
Public Made by Adomby adom
Texas Instruments Surge Suppressors, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM25069PMME-2
Texas Instruments · Surge Suppressors · MSOP-10
LM25069PMME-2 from Texas Instruments, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SENSE | input | Current sense input: the voltage across the current sense resistor RS is measured from VIN to this pin, and the load current is limited with the fault timer activated when that voltage reaches 50mV. |
| 2 | VIN | power_in | Positive supply input, rated for +2.9V to 17V supply voltage, with a small ceramic bypass capacitor placed close to this pin recommended to suppress transients when load current is switched off. |
| 3 | UVLO/EN | input | Under-voltage lockout input set by an external resistor divider from the system input, with a 1.17V enable threshold, an internal 20µA hysteresis current source, and optional use for remote shutdown. |
| 4 | OVLO | input | Over-voltage lockout input set by an external resistor divider from the system input, with a 1.16V disable threshold and an internal 20µA hysteresis current source. |
| 5 | GND | power_in | Circuit ground. |
| 6 | TIMER | passive | Timing capacitor connection that sets the insertion time delay and the fault timeout period, and also sets the restart timing of the LM25069-2. |
| 7 | PWR | input | Power limit set: an external resistor on this pin, together with the current sense resistor RS, sets the maximum power dissipation allowed in the external series pass MOSFET. |
| 8 | PGD | output | Open-drain Power Good output that goes active high when the external MOSFET VDS falls below 1.3V and switches low when VDS rises above 1.9V; PGD off voltage is rated 0V to 17V. |
| 9 | OUT | input | Output feedback connected to the output rail (external MOSFET source), used internally to determine MOSFET VDS for power limiting and to control the PGD indicator. |
| 10 | GATE | output | Gate drive output for the external N-channel MOSFET, with the voltage limited to 19.5V above ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-10 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input current, enabled | IIN-EN | 1.6 | 2.4 | mA | UVLO = 2V and OVLO = 0.7V, VIN = 14V | 3 | |
| Input current, disabled | IIN-DIS | 1 | 1.6 | mA | UVLO = 0.7V or OVLO = 2V | 3 | |
| Power On Reset threshold at VIN | POR | 2.6 | 2.8 | V | VIN Increasing | 3 | |
| UVLO threshold | UVLOTH | 1.154 | 1.17 | 1.183 | V | 3 | |
| UVLO hysteresis current | UVLOHYS | 15 | 20 | 26 | µA | UVLO = 1V | 3 |
| OVLO threshold | OVLOTH | 1.142 | 1.16 | 1.185 | V | 3 | |
| OVLO hysteresis current | OVLOHYS | -26 | -20 | -15 | µA | OVLO = 2V | 3 |
| Power limit sense voltage (VIN-SENSE) | PWRLIM-1 | 19 | 25 | 31 | mV | SENSE-OUT = 12V, RPWR = 69.8 kΩ | 4 |
| GATE source current | IGATE | -27 | -20 | -13 | µA | Normal Operation | 4 |
| GATE sink current | 1.5 | 2 | 2.7 | mA | UVLO = 1V | 4 | |
| GATE pull-down current | 160 | 260 | 375 | mA | VIN - SENSE = 150 mV or VIN < POR, VGATE = 5V | 4 | |
| Gate output voltage in normal operation | VGATE | 18 | 19.5 | 21 | V | GATE voltage with respect to ground | 4 |
| Current limit threshold voltage | VCL | 45 | 50 | 55 | mV | VIN-SENSE voltage | 4 |
| Circuit breaker threshold voltage | VCB | 75 | 95 | 110 | mV | VIN - SENSE | 4 |
| Circuit breaker response time | tCB | 0.19 | 0.36 | µs | VIN - SENSE stepped from 0 mV to 150 mV, time to GATE low, no load | 4 | |
| Timer upper threshold | VTMRH | 1.6 | 1.72 | 1.85 | V | 4 | |
| Timer lower threshold | VTMRL | 0.9 | 1 | 1.1 | V | Restart cycles (LM25069-2) | 4 |
| Insertion time current | ITIMER | -7.5 | -5.5 | -3.5 | µA | 4 | |
| Sink current, end of insertion time | 1.5 | 2 | 2.5 | mA | TIMER pin = 2V | 4 | |
| Fault detection current | -110 | -80 | -50 | µA | 4 | ||
| Fault sink current | 1.6 | 2.5 | 3.4 | µA | 4 | ||
| Power good threshold measured at SENSE-OUT | PGDTH | 1.3 | 1.9 | V | Decreasing | 4 | |
| PGD output low voltage | PGDVOL | 15 | 30 | mV | ISINK = 2 mA | 4 | |
| VIN supply voltage | VIN | 2.9 | 17 | V | 3 | ||
| PGD off voltage | 0 | 17 | V | 3 | |||
| Junction temperature range | TJ | -40 | 85 | °C | 3 | ||
| VIN to GND | VIN | -0.3 | 20 | V | 3 | ||
| SENSE, OUT, PGD to GND | -0.3 | 20 | V | 3 | |||
| UVLO to GND | -0.3 | 20 | V | 3 | |||
| OVLO to GND | -0.3 | 20 | V | 3 | |||
| VIN to SENSE | -0.3 | 0.3 | V | 3 | |||
| ESD rating, Human Body Model | 2 | kV | Human body model, 100 pF through 1.5 kΩ | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Junction temperature | TJ | 150 | °C | 3 | |||
| Lead temperature | 260 | °C | Soldering 4 sec | 3 | |||
| POR hysteresis | PORHYS | 150 | mV | VIN decreasing | 3 | ||
| OUT bias current, enabled | IOUT-EN | 0.3 | µA | OUT = VIN, Normal operation | 3 | ||
| OUT bias current, disabled | IOUT-DIS | -12 | µA | Disabled, OUT = 0V, SENSE = VIN | 3 | ||
| UVLO delay to GATE high | UVLODEL | 15 | µs | 3 | |||
| UVLO delay to GATE low | UVLODEL | 8.3 | µs | 3 | |||
| UVLO bias current | UVLOBIAS | 1 | µA | UVLO = 3V | 3 | ||
| OVLO delay to GATE high | OVLODEL | 16 | µs | 3 | |||
| OVLO delay to GATE low | OVLODEL | 8.2 | µs | 3 | |||
| OVLO bias current | OVLOBIAS | 1 | µA | OVLO = 1V | 3 | ||
| PWR pin current | IPWR | -15 | µA | VPWR = 2.5V | 4 | ||
| PWR pin impedance when disabled | RSAT(PWR) | 140 | Ω | UVLO = 0.7V | 4 | ||
| Current limit response time | tCL | 15 | µs | VIN-SENSE stepped from 0 mV to 80 mV | 4 | ||
| SENSE input current | ISENSE | 23 | µA | Enabled, SENSE = OUT | 4 | ||
| SENSE input current | ISENSE | 12 | µA | Disabled, OUT = 0V | 4 | ||
| SENSE input current | ISENSE | 62 | µA | Enabled, OUT = 0V | 4 | ||
| Timer lower threshold, end of 8th cycle | VTMRL | 0.3 | V | End of 8th cycle (LM25069-2) | 4 | ||
| PGD threshold hysteresis | 0.6 | V | 4 | ||||
| PGD off leakage current | PGDIOH | 1 | µA | VPGD = 17V | 4 | ||
| Fault restart duty cycle | DCFAULT | 0.67 | % | LM25069-2 only | 4 | ||
| Fault to GATE low delay | tFAULT | 20 | µs | TIMER pin reaches the upper threshold | 4 |
CAD (KiCad official)
- Symbol:
LM25069PMME-2 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
962cac4769e39608, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).