component
LM25066PSQ
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, WQFN-24-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownLM25066PSQ
Texas Instruments · Power Management - Specialized · WQFN-24-EP(4x5)
LM25066PSQ from Texas Instruments, in a WQFN-24-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADR2 | input | SMBus address line 2; 3-state address line that should be left floating or connected directly to VDD or GND. |
| 2 | ADR1 | input | SMBus address line 1; 3-state address line that should be left floating or connected directly to VDD or GND. |
| 3 | ADR0 | input | SMBus address line 0; 3-state address line that should be left floating or connected directly to VDD or GND. |
| 4 | VDD | power_out | Internally sub-regulated 4.5 V bias supply; requires 1 µF bypass capacitor to ground. |
| 5 | CL | input | Current limit range configuration; connect to GND for 25 mV threshold or to VDD for 46 mV threshold. |
| 6 | CB | input | Circuit breaker range configuration; connect to GND for 1.8× overcurrent threshold or to VDD for 3.6× threshold. |
| 7 | FB | input | Power good feedback with 1.167 V threshold and 24 µA hysteresis current source for external resistor divider from output. |
| 8 | RETRY | input | Fault retry configuration; connect to GND for continuous retry or to VDD for latch-off during fault. |
| 9 | TIMER | passive | Timing capacitor connection point that sets insertion time delay, fault timeout period, and restart timing. |
| 10 | PWR | passive | Power limit set point with external resistor connection to set maximum MOSFET power dissipation. |
| 11 | PGD | output | Power good indicator open-drain output; high when FB exceeds 1.167 V and input within UVLO/OVLO thresholds; requires external pullup resistor. |
| 12 | OUT | input | Output feedback connection to external MOSFET source for VDS voltage monitoring and output voltage measurement. |
| 13 | GATE | output | Gate drive output for external MOSFET gate connection with 22-µA source and 2 mA/190 mA pulldown current. |
| 14 | SENSE | input | Current sense input measuring voltage across current sense resistor from VIN; triggers overcurrent limiting and fault timer. |
| 15 | VIN | power_in | Positive supply input with input voltage range of 2.9 V to 17 V; small ceramic bypass capacitor recommended to suppress transients. |
| 16 | UVLO/EN | input | Undervoltage lockout input with 1.16 V enable threshold and 23-µA hysteresis current source; external resistor divider sets threshold or enables remote shutdown. |
| 17 | OVLO | input | Overvoltage lockout input with 1.16 V disable threshold and 23-µA hysteresis current source via external resistor divider. |
| 18 | GND | power_in | Circuit ground reference. |
| 19 | SDA | tri_state | SMBus data open-drain output requiring external pullup resistor to VDD or other voltage source. |
| 20 | SCL | tri_state | SMBus clock open-drain output requiring external pullup resistor to VDD or other voltage source. |
| 21 | SMBA | output | SMBus alert active-low open-drain output requiring external pullup resistor to VDD or other voltage source. |
| 22 | VREF | power_out | Internal precision 2.73 V reference for analog-to-digital conversion; requires 1 µF bypass capacitor to ground. |
| 23 | DIODE | passive | External diode connection point for temperature monitoring via diode-configured NPN transistor or tie to ground if unused. |
| 24 | VAUX | input | Auxiliary voltage input for external voltage telemetry with full scale input range of 0 V to 1.16 V. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x5) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
LM25066PSQ - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: WQFN-24-EP(4x5) (KiCad packages3D, STEP)
- 3D model files:
lm25066psq-etched.step/lm25066psq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm25066psq.step/lm25066psq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (63 pp, sha256
f2e07e7a0b250023, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).