component
LM25066IPSQX
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), WQFN-24(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM25066IPSQX
Texas Instruments · Surge Protection Devices (SPDs) · WQFN-24(4x5)
LM25066IPSQX from Texas Instruments, in a WQFN-24(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADR2 | input | SMBus address line 2 is a three-state strap that must be connected to GND, VDD, or left floating. |
| 2 | ADR1 | input | SMBus address line 1 is a three-state strap that must be connected to GND, VDD, or left floating. |
| 3 | ADR0 | input | SMBus address line 0 is a three-state strap that must be connected to GND, VDD, or left floating. |
| 4 | VDD | power_out | Internally sub-regulated 4.5V bias supply output that requires a 1 µF capacitor to ground for bypassing. |
| 5 | CL | input | Current limit range select: connecting to GND sets the over-current threshold to 25 mV, and connecting to VDD sets it to 46 mV. |
| 6 | CB | input | Circuit breaker range select: connecting to GND sets the trip point to 1.8 times the over-current threshold, and connecting to VDD sets it to 3.6 times. |
| 7 | FB | input | Power Good feedback input, where an external OUT resistor divider sets the PGD switching point at a 1.167 V threshold with an internal 24 µA hysteresis current source. |
| 8 | RETRY | input | Fault retry select: grounding this pin gives continual retries during a fault, while connecting it to VDD latches the device off during a fault. |
| 9 | TIMER | passive | Timing capacitor connection that sets the insertion time delay, fault timeout period and restart timing. |
| 10 | PWR | input | Power limit set: an external resistor here, together with the current sense resistor RS, sets the maximum power dissipation allowed in the external series pass MOSFET. |
| 11 | PGD | output | Open-drain Power Good output that is high when FB is above 1.167 V and the input supply is within its under-voltage and over-voltage thresholds, and that must be pulled up through an external resistor. |
| 12 | OUT | passive | Output feedback connected to the output rail (external MOSFET source), used to determine MOSFET VDS for power limiting and to monitor output voltage; the Out to GND rating is -1 to 20V. |
| 13 | GATE | output | Gate drive output connected to the external MOSFET gate, with the gate voltage limited by an internal 18.8 V zener clamp. |
| 14 | SENSE | input | Current sense input, where the voltage across the current sense resistor RS is measured from VIN to this pin. |
| 15 | VIN | power_in | Positive supply input with an operating range of 2.9 V to 17 V, which should have a small ceramic bypass capacitor placed close to the pin. |
| 16 | UVLO/EN | input | Under-voltage lockout and enable input, where an external divider sets the turn-on threshold, the enable threshold is 1.16 V, and an internal 23 µA hysteresis current source is provided; it can also be used for remote shutdown. |
| 17 | OVLO | input | Over-voltage lockout input, where an external divider sets the turn-off threshold, the disable threshold is 1.16 V, and an internal 23 µA hysteresis current source is provided. |
| 18 | GND | power_in | Circuit ground. |
| 19 | SDA | bidirectional | SMBus data pin. |
| 20 | SCL | input | SMBus clock pin. |
| 21 | SMBA | output | SMBus alert line, active low. |
| 22 | VREF | power_out | Internally generated precision 2.73V reference used for analog-to-digital conversion, which requires a 1 µF capacitor to ground for bypassing. |
| 23 | DIODE | passive | External diode connection for a diode-configured NPN transistor used for temperature monitoring. |
| 24 | VAUX | input | Auxiliary voltage input for telemetry from an external source, with a full-scale input of 1.16 V. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24(4x5) |
| Category | Circuit Protection |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
LM25066IPSQX - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: WQFN-24(4x5) (KiCad packages3D, STEP)
- 3D model files:
lm25066ipsqx-etched.step/lm25066ipsqx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm25066ipsqx.step/lm25066ipsqx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (59 pp, sha256
af8bdb207ef7d7d6, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM25066IPSQX
**Texas Instruments** · Surge Protection Devices (SPDs) · WQFN-24(4x5)
LM25066IPSQX from Texas Instruments, in a WQFN-24(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADR2 | input | SMBus address line 2 is a three-state strap that must be connected to GND, VDD, or left floating. |
| 2 | ADR1 | input | SMBus address line 1 is a three-state strap that must be connected to GND, VDD, or left floating. |
| 3 | ADR0 | input | SMBus address line 0 is a three-state strap that must be connected to GND, VDD, or left floating. |
| 4 | VDD | power_out | Internally sub-regulated 4.5V bias supply output that requires a 1 µF capacitor to ground for bypassing. |
| 5 | CL | input | Current limit range select: connecting to GND sets the over-current threshold to 25 mV, and connecting to VDD sets it to 46 mV. |
| 6 | CB | input | Circuit breaker range select: connecting to GND sets the trip point to 1.8 times the over-current threshold, and connecting to VDD sets it to 3.6 times. |
| 7 | FB | input | Power Good feedback input, where an external OUT resistor divider sets the PGD switching point at a 1.167 V threshold with an internal 24 µA hysteresis current source. |
| 8 | RETRY | input | Fault retry select: grounding this pin gives continual retries during a fault, while connecting it to VDD latches the device off during a fault. |
| 9 | TIMER | passive | Timing capacitor connection that sets the insertion time delay, fault timeout period and restart timing. |
| 10 | PWR | input | Power limit set: an external resistor here, together with the current sense resistor RS, sets the maximum power dissipation allowed in the external series pass MOSFET. |
| 11 | PGD | output | Open-drain Power Good output that is high when FB is above 1.167 V and the input supply is within its under-voltage and over-voltage thresholds, and that must be pulled up through an external resistor. |
| 12 | OUT | passive | Output feedback connected to the output rail (external MOSFET source), used to determine MOSFET VDS for power limiting and to monitor output voltage; the Out to GND rating is -1 to 20V. |
| 13 | GATE | output | Gate drive output connected to the external MOSFET gate, with the gate voltage limited by an internal 18.8 V zener clamp. |
| 14 | SENSE | input | Current sense input, where the voltage across the current sense resistor RS is measured from VIN to this pin. |
| 15 | VIN | power_in | Positive supply input with an operating range of 2.9 V to 17 V, which should have a small ceramic bypass capacitor placed close to the pin. |
| 16 | UVLO/EN | input | Under-voltage lockout and enable input, where an external divider sets the turn-on threshold, the enable threshold is 1.16 V, and an internal 23 µA hysteresis current source is provided; it can also be used for remote shutdown. |
| 17 | OVLO | input | Over-voltage lockout input, where an external divider sets the turn-off threshold, the disable threshold is 1.16 V, and an internal 23 µA hysteresis current source is provided. |
| 18 | GND | power_in | Circuit ground. |
| 19 | SDA | bidirectional | SMBus data pin. |
| 20 | SCL | input | SMBus clock pin. |
| 21 | SMBA | output | SMBus alert line, active low. |
| 22 | VREF | power_out | Internally generated precision 2.73V reference used for analog-to-digital conversion, which requires a 1 µF capacitor to ground for bypassing. |
| 23 | DIODE | passive | External diode connection for a diode-configured NPN transistor used for temperature monitoring. |
| 24 | VAUX | input | Auxiliary voltage input for telemetry from an external source, with a full-scale input of 1.16 V. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24(4x5) |
| Category | Circuit Protection |
| Pins | 25 |
## CAD (KiCad official)
- Symbol: `LM25066IPSQX`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm`
- 3D model: WQFN-24(4x5) (KiCad packages3D, STEP)
- 3D model files: `lm25066ipsqx-etched.step` / `lm25066ipsqx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm25066ipsqx.step` / `lm25066ipsqx.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm25066i) (59 pp, sha256 `af8bdb207ef7d7d6`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm25066ipsqx-datasheet.pdf)