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LM224DR2G

Public Made by Adom

by adom

onsemi Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM224DR2G

onsemi · Operational Amplifier · SOIC-14

LM224DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Out 1 output Output of amplifier 1; short-circuit protected with continuous output short-circuit duration, and the output voltage range includes the negative supply voltage.
2 Inputs 1 input Input of amplifier 1 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
3 Inputs 1 input Input of amplifier 1 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
4 VCC power_in Positive supply: 3.0 V to 32 V single-supply operation, maximum VCC 32 V (or ±16 V split supplies).
5 Inputs 2 input Input of amplifier 2 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
6 Inputs 2 input Input of amplifier 2 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
7 Out 2 output Output of amplifier 2; short-circuit protected with continuous output short-circuit duration, and the output voltage range includes the negative supply voltage.
8 Out 3 output Output of amplifier 3; short-circuit protected with continuous output short-circuit duration, and the output voltage range includes the negative supply voltage.
9 Inputs 3 input Input of amplifier 3 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
10 Inputs 3 input Input of amplifier 3 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
11 VEE, GND power_in Negative supply for split-supply operation (up to ±16 V) or ground for single-supply operation.
12 Inputs 4 input Input of amplifier 4 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
13 Inputs 4 input Input of amplifier 4 from the true differential input stage; the common-mode voltage must not go below the negative supply/ground by more than 0.3 V, the upper limit is VCC −1.7 V, and either input can go to +32 V without damage.
14 Out 4 output Output of amplifier 4; short-circuit protected with continuous output short-circuit duration, and the output voltage range includes the negative supply voltage.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage (TA = 25°C) VIO 2 5 mV VCC = 5.0 V to 30 V, VICR = 0 V to VCC −1.7 V, VO = 1.4 V, RS = 0 Ω, TA = 25°C 3
Input Offset Voltage (TA = Thigh) VIO 7 mV TA = Thigh (Note 4) 3
Input Offset Voltage (TA = Tlow) VIO 7 mV TA = Tlow (Note 4) 3
Input Offset Current IIO 3 30 nA 3
Input Offset Current (TA = Thigh to Tlow) IIO 100 nA TA = Thigh to Tlow (Note 4) 3
Input Bias Current IIB -90 -150 nA 3
Input Bias Current (TA = Thigh to Tlow) IIB -300 nA TA = Thigh to Tlow (Note 4) 3
Input Common Mode Voltage Range VICR 0 28.3 V VCC = 30 V, TA = +25°C 3
Input Common Mode Voltage Range (TA = Thigh to Tlow) VICR 0 28 V VCC = 30 V, TA = Thigh to Tlow (Note 4) 3
Large Signal Open Loop Voltage Gain AVOL 50 100 V/mV RL = 2.0 kΩ, VCC = 15 V, for Large VO Swing 3
Large Signal Open Loop Voltage Gain (TA = Thigh to Tlow) AVOL 25 V/mV RL = 2.0 kΩ, VCC = 15 V, TA = Thigh to Tlow (Note 4) 3
Common Mode Rejection CMR 70 85 dB RS ≤ 10 kΩ 3
Power Supply Rejection PSR 65 100 dB 3
Output Voltage High Limit VOH 3.3 3.5 V VCC = 5.0 V, RL = 2.0 kΩ, TA = 25°C 4
Output Voltage High Limit (RL = 2.0 kΩ) VOH 26 V VCC = 30 V, RL = 2.0 kΩ, TA = Thigh to Tlow (Note 7) 4
Output Voltage High Limit (RL = 10 kΩ) VOH 27 28 V VCC = 30 V, RL = 10 kΩ, TA = Thigh to Tlow (Note 7) 4
Output Voltage Low Limit VOL 5 20 mV VCC = 5.0 V, RL = 10 kΩ, TA = Thigh to Tlow (Note 7) 4
Output Source Current (TA = 25°C) IO+ 20 40 mA VID = +1.0 V, VCC = 15 V, TA = 25°C 4
Output Source Current (TA = Thigh to Tlow) IO+ 10 20 mA VID = +1.0 V, VCC = 15 V, TA = Thigh to Tlow (Note 7) 4
Output Sink Current (TA = 25°C) IO- 10 20 mA VID = −1.0 V, VCC = 15 V, TA = 25°C 4
Output Sink Current (TA = Thigh to Tlow) IO- 5 8 mA VID = −1.0 V, VCC = 15 V, TA = Thigh to Tlow (Note 7) 4
Output Sink Current (small output swing) IO- 12 50 A VID = −1.0 V, VO = 200 mV, TA = 25°C 4
Output Short Circuit to Ground ISC 40 60 mA Note 8 4
Power Supply Current (VCC = 30 V) ICC 3 mA VCC = 30 V, VO = 0 V, RL = ∞, TA = Thigh to Tlow (Note 7) 4
Power Supply Current (VCC = 5.0 V) ICC 1.2 mA VCC = 5.0 V, VO = 0 V, RL = ∞, TA = Thigh to Tlow (Note 7) 4
Single Supply Voltage VCC 32 Vdc Single supply 2
Split Supplies Voltage VCC, VEE -16 16 Vdc Split supplies (printed ±16) 2
Input Differential Voltage Range VIDR -32 32 Vdc Split power supplies (Note 1) 2
Input Common Mode Voltage Range VICR -0.3 32 Vdc 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Operating Ambient Temperature Range (LM224) TA -25 85 °C LM224 grade 2
Thermal Resistance, Junction-to-Air (Case 751A, SOIC-14) RJA 156 °C/W Case 751A, evaluation board with 1 oz copper traces, minimum pad size (Note 2) 2

CAD (KiCad official)

  • Symbol: LM224DR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: lm224dr2g-etched.step / lm224dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm224dr2g.step / lm224dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (14 pp, sha256 f6df9932b264fd01, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF