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LM217T-DG

Public Made by Adom

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STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM217T-DG

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-220

LM217T-DG from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ADJUST passive Adjustment terminal that sets the output voltage via the resistor divider, with a 1.25 V reference between OUTPUT and ADJUST and IADJ of 100 µA max.
2 OUTPUT power_out Regulated output terminal (1.2 to 37 V adjustable, over 1.5 A), also connected internally to the metal tab.
3 INPUT power_in Unregulated input terminal, with the input-to-output differential limited to 40 V maximum.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-220
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Line regulation ΔVO 0.01 0.02 %/V VI - VO = 3 to 40 V, TJ = 25°C 5
Line regulation (second row) ΔVO 0.02 0.05 %/V VI - VO = 3 to 40 V 5
Load regulation VO ≤ 5 V ΔVO 5 15 mV VO ≤ 5 V, IO = 10 mA to IMAX, TJ = 25°C 5
Load regulation VO ≤ 5 V (second row) ΔVO 20 50 mV VO ≤ 5 V, IO = 10 mA to IMAX 5
Load regulation VO ≥ 5 V ΔVO 0.1 0.3 % VO ≥ 5 V, IO = 10 mA to IMAX, TJ = 25°C 5
Load regulation VO ≥ 5 V (second row) ΔVO 0.3 1 % VO ≥ 5 V, IO = 10 mA to IMAX 5
Adjustment pin current IADJ 50 100 µA 5
Adjustment pin current change ΔIADJ 0.2 5 µA VI - VO = 2.5 to 40 V, IO = 10 mA to IMAX 5
Reference voltage VREF 1.2 1.25 1.3 V VI - VO = 2.5 to 40 V, IO = 10 mA to IMAX, PD ≤ PMAX 5
Minimum load current IO(min) 3.5 5 mA VI - VO = 40 V 5
Maximum load current IO(max) 1.5 2.2 A VI - VO ≤ 15 V, PD < PMAX 5
Supply voltage rejection, CADJ = 10 µF SVR 66 80 dB TJ = 25°C, f = 120 Hz, CADJ = 10 µF 5
Input-reference differential voltage VI - VO 40 V 3
Operating junction temperature (LM217) TOP -25 150 °C LM217 3
Storage temperature TSTG -65 150 °C 3
Output voltage temperature stability ΔVO/VO 1 % 5
Maximum load current at 40 V IO(max) 0.4 A VI - VO = 40 V, PD < PMAX, TJ = 25°C 5
Output noise voltage (percentage of VO) eN 0.003 % B = 10 Hz to 100 kHz, TJ = 25°C 5
Supply voltage rejection, CADJ = 0 SVR 65 dB TJ = 25°C, f = 120 Hz, CADJ = 0 5
Thermal resistance junction-ambient (TO-220) RthJA 50 °C/W TO-220 3
Thermal resistance junction-case (TO-220) RthJC 5 °C/W TO-220 3

CAD (KiCad official)

  • Symbol: LM217T-DG
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: lm217t-dg-etched.step / lm217t-dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm217t-dg.step / lm217t-dg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (34 pp, sha256 22e0a613ceff898c, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF