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LM21212MH-2
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Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM21212MH-2
Texas Instruments · DC-DC Converters · HTSSOP-20-EP
LM21212MH-2 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FADJ | input | Frequency Adjust pin; switching frequency can be set between 300kHz and 1.55MHz by connecting a resistor between this pin and AGND. |
| 2 | SS/TRK | input | Soft-start control pin; an internal 2 µA current source charges an external capacitor connected between this pin and AGND to set the output voltage ramp rate during startup; can also be used to configure the tracking feature. |
| 3 | EN | input | Active high enable input for the device; if not used, the EN pin can be left open, which will go high due to an internal current source. |
| 4 | AVIN | power_in | Analog input voltage supply that generates the internal bias; it is recommended to connect PVIN to AVIN through a low pass RC filter to minimize the influence of input rail ripple and noise on the analog control circuitry. |
| 5 | PVIN | power_in | Input voltage to the power switches inside the device with input voltage range 2.95V to 5.5V; these pins should be connected together at the device with low ESR input capacitance located as close as possible. |
| 6 | PVIN | power_in | Input voltage to the power switches inside the device with input voltage range 2.95V to 5.5V; these pins should be connected together at the device with low ESR input capacitance located as close as possible. |
| 7 | PVIN | power_in | Input voltage to the power switches inside the device with input voltage range 2.95V to 5.5V; these pins should be connected together at the device with low ESR input capacitance located as close as possible. |
| 8 | PGND | power_in | Power ground pins for the internal power switches. |
| 9 | PGND | power_in | Power ground pins for the internal power switches. |
| 10 | PGND | power_in | Power ground pins for the internal power switches. |
| 11 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 12 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 13 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 14 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 15 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 16 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 17 | PGOOD | output | Open-drain power good indicator. |
| 18 | COMP | output | Compensation pin connected to the output of the voltage loop error amplifier. |
| 19 | FB | input | Feedback pin connected to the inverting input of the voltage loop error amplifier. |
| 20 | AGND | power_in | Quiet analog ground for the internal reference and bias circuitry. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
LM21212MH-2 - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
lm21212mh-2-etched.step/lm21212mh-2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm21212mh-2.step/lm21212mh-2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
ffdfc10f56f46bdb, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM21212MH-2
**Texas Instruments** · DC-DC Converters · HTSSOP-20-EP
LM21212MH-2 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FADJ | input | Frequency Adjust pin; switching frequency can be set between 300kHz and 1.55MHz by connecting a resistor between this pin and AGND. |
| 2 | SS/TRK | input | Soft-start control pin; an internal 2 µA current source charges an external capacitor connected between this pin and AGND to set the output voltage ramp rate during startup; can also be used to configure the tracking feature. |
| 3 | EN | input | Active high enable input for the device; if not used, the EN pin can be left open, which will go high due to an internal current source. |
| 4 | AVIN | power_in | Analog input voltage supply that generates the internal bias; it is recommended to connect PVIN to AVIN through a low pass RC filter to minimize the influence of input rail ripple and noise on the analog control circuitry. |
| 5 | PVIN | power_in | Input voltage to the power switches inside the device with input voltage range 2.95V to 5.5V; these pins should be connected together at the device with low ESR input capacitance located as close as possible. |
| 6 | PVIN | power_in | Input voltage to the power switches inside the device with input voltage range 2.95V to 5.5V; these pins should be connected together at the device with low ESR input capacitance located as close as possible. |
| 7 | PVIN | power_in | Input voltage to the power switches inside the device with input voltage range 2.95V to 5.5V; these pins should be connected together at the device with low ESR input capacitance located as close as possible. |
| 8 | PGND | power_in | Power ground pins for the internal power switches. |
| 9 | PGND | power_in | Power ground pins for the internal power switches. |
| 10 | PGND | power_in | Power ground pins for the internal power switches. |
| 11 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 12 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 13 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 14 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 15 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 16 | SW | output | Switch node pins; these pins should be tied together locally and connected to the filter inductor. |
| 17 | PGOOD | output | Open-drain power good indicator. |
| 18 | COMP | output | Compensation pin connected to the output of the voltage loop error amplifier. |
| 19 | FB | input | Feedback pin connected to the inverting input of the voltage loop error amplifier. |
| 20 | AGND | power_in | Quiet analog ground for the internal reference and bias circuitry. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
## CAD (KiCad official)
- Symbol: `LM21212MH-2`
- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`
- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `lm21212mh-2-etched.step` / `lm21212mh-2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm21212mh-2.step` / `lm21212mh-2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm21212-2) (39 pp, sha256 `ffdfc10f56f46bdb`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm21212mh-2-datasheet.pdf)