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LM10011SD

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Texas Instruments Power Management Specialized - PMIC, WSON-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM10011SD

Texas Instruments · Power Management Specialized - PMIC · WSON-10-EP(3x3)

LM10011SD from Texas Instruments, in a WSON-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground.
2 IDAC_OUT output Output pin of the current DAC that connects to the feedback node of the regulator (0 to 59.2 µA full-scale range).
3 VDD power_in Positive supply input with operating voltage of 2.97 V to 5.5 V; a 1-nF or greater bypass capacitor to GND is recommended.
4 EN input Precision enable input; the device operates when the EN pin voltage exceeds 1.34 V.
5 MODE input Sets the VID operating mode: connect to VDD for the 4-bit parallel interface or to GND for the 4-pin, 6-bit interface.
6 SET passive A resistor from SET to GND sets the start-up code (current) at IDAC_OUT, with 16 start-up codes to select from.
7 VIDA input VID digital input: in 6-bit mode Bit 0 when VIDS transitions low and Bit 3 when VIDS transitions high; in 4-bit mode Bit 0.
8 VIDB input VID digital input: in 6-bit mode Bit 1 when VIDS transitions low and Bit 4 when VIDS transitions high; in 4-bit mode Bit 1.
9 VIDC input VID digital input: in 6-bit mode Bit 2 when VIDS transitions low and Bit 5 when VIDS transitions high; in 4-bit mode Bit 2.
10 VIDS input VID select line: in 6-bit mode a low transition selects the lower 3 bits and a high transition selects the upper 3 bits and updates the IDAC_OUT current; in 4-bit mode Bit 3.
11 DAP passive Die Attach Pad, not electrically connected to the device; connect to the system ground plane for reduced thermal resistance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-10-EP(3x3)
Category Power Supply Chip
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Quiescent current IQ 260 300 µA VDD = 5.0 V, VEN = 2.0 V 5
Quiescent current, IDAC_OUT = IFS_6 IQ_FS 382 µA VDD = 5.0 V, VEN = 2.0 V, IFS_6 5
Quiescent current disabled IQ_DIS 45 65 µA VDD = 5.0 V, VEN = 0.0 V 5
Undervoltage rising threshold VUVLO_R 2.65 2.95 V VDD rising 5
Undervoltage falling threshold VUVLO_F 2.2 2.45 V VDD falling 5
UVLO hysteresis VUVLO_HYS 200 mV 5
Enable rising threshold VEN 1.2 1.34 1.45 V VEN rising 5
Enable hysteresis VEN_HYS 50 100 180 mV 5
Enable pullup current IEN 2 µA 5
IDAC_OUT accuracy ACC -1.25 1.25 % Measured at full scale 5
IDAC_OUT accuracy ACC -1 1 % Measured at full scale, 0°C to 100°C 5
Integral non-linearity INL -1 1 LSB_6 5
Differential non-linearity DNL -0.25 0.25 LSB_6 5
DAC step size, 6-bit mode LSB_6 940 nA IFS_6 / (2^6, 1) 5
DAC step size, 4-bit mode LSB_4 3.76 µA IFS_4 / (2^4, 1) 5
Full-scale output current (6-bit mode) IFS_6 59.2 µA VID[5:0] = 000000b 5
Full-scale output current (4-bit mode) IFS_4 56.4 µA VID[3:0] = 0000b 5
Offset current OFFSET 60 nA VID[5:0] = 111111b (6-bit), VID[3:0] = 1111b (4-bit) 5
IDAC_OUT compliance voltage VOUT_MAX 1.75 V VDD = 3 V, VDD-VIDAC_OUT 5
SET pin voltage FSR VSETFSR 1.12 1.2 1.23 V 5
SET ADC resolution SETRES 4 bits 5
SET ADC current full-scale range SETRNG 56.4 µA 5
SET current ISET 4.75 5.1 5.4 µA 5
Start-up DAC error, codes 4-14 SET4-SET14 0 1 LSB RSET per code, 1% E96 5
Input voltage low VIL 0.75 V 6
Input voltage high VIH 1 V 6
Input current low IIL -3.5 µA 6
Input current high IIH 5 µA 6
Input deglitch time tDEGLITCH 3.6 µs 6
Delay to beginning of IDAC_OUT transition t5 6.3 10 µs Measured from VIDS rising edge 6
IDAC_OUT transition time t6 40 µs Time constant for exponential rise 6
Minimum hold time in 4-bit mode t7 4.4 µs VIDA, VIDB, VIDC, VIDS 6
Supply voltage VDD VDD 2.97 5.5 V 4
IDAC_OUT voltage IDAC_OUT -0.3 V max is VDD, 1.75 V 4
VID, EN, MODE input voltage -0.3 5.5 V VIDA, VIDB, VIDC, VIDS, EN, MODE 4
Junction temperature TJ -40 125 °C 4
Ambient temperature TA -40 125 °C 4
VDD, EN, IDAC_OUT, MODE voltage -0.3 6 V 3
VIDA, VIDB, VIDC, VIDS voltage -0.3 6 V 3
Junction temperature TJ 150 °C 3
Storage temperature range Tstg -65 150 °C 4
ESD HBM V(ESD) 2 kV Human body model, all pins 4
ESD CDM V(ESD) 1 kV Charged device model, all pins 4
Junction-to-ambient thermal resistance RθJA 52.1 °C/W DSC, 10 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 30.6 °C/W DSC, 10 pins 4
Junction-to-board thermal resistance RθJB 26.8 °C/W DSC, 10 pins 4
Junction-to-top characterization parameter ψJT 0.9 °C/W DSC, 10 pins 4
Junction-to-board characterization parameter ψJB 26.9 °C/W DSC, 10 pins 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 7.7 °C/W DSC, 10 pins 4

CAD (KiCad official)

  • Symbol: LM10011SD
  • Footprint: Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm
  • 3D model: WSON-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: lm10011sd-etched.step / lm10011sd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm10011sd.step / lm10011sd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 b82d7be86f059974, retrieved 2026-10-22, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF