component
LM-PJSRV05W-4GDW
Public Made by Adomby adom
Leiditech ESD And Surge Protection (TVS/ESD), SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
LM-PJSRV05W-4GDW
Leiditech · ESD And Surge Protection (TVS/ESD) · SOT-363
LM-PJSRV05W-4GDW from Leiditech, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected line 1 (steering-diode pair midpoint, bottom-left of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
| 2 | GND | power_in | Common ground, connected to the anode of the central TVS zener diode in the pin configuration diagram. |
| 3 | I/O2 | passive | Protected line 2 (steering-diode pair midpoint, bottom-right of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
| 4 | I/O3 | passive | Protected line 3 (steering-diode pair midpoint, top-right of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
| 5 | VCC | power_in | Connected to the cathode of the central TVS zener diode (positive rail of the steering diodes); 5V reverse working voltage (VRWM). |
| 6 | I/O4 | passive | Protected line 4 (steering-diode pair midpoint, top-left of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-363 |
| Category | Circuit Protection |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power (8/20µs) | Ppp | 100 | W | 1 | |||
| ESD per IEC 61000-4-2 (Air) | VESD | -25 | 25 | Kv | per IEC 61000-4-2 (Air) | 1 | |
| ESD per IEC 61000-4-2 (Contact) | VESD | -20 | 20 | Kv | per IEC 61000-4-2 (Contact) | 1 | |
| Operating Temperature Range | TJ | -55 | 125 | ℃ | 1 | ||
| Storage Temperature Range | TSTJ | -55 | 150 | ℃ | 1 | ||
| Reverse Working Voltage | VRWM | 5 | V | 2 | |||
| Breakdown Voltage | VBR | 6 | V | IT = 1mA | 2 | ||
| Reverse Leakage Current | IR | 0.5 | µA | VRWM = 5V | 2 | ||
| Clamping Voltage (IPP = 1A) | VC | 15 | V | IPP = 1A (8 x 20 s pulse) | 2 | ||
| Clamping Voltage (IPP = 5A) | VC | 20 | V | IPP = 5A (8 x 20 s pulse) | 2 | ||
| Junction Capacitance | CJ | 0.8 | pF | V = 0V, f = 1MHz | 2 |
CAD (KiCad official)
- Symbol:
LM-PJSRV05W-4GDW - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
lm-pjsrv05w-4gdw-etched.step/lm-pjsrv05w-4gdw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm-pjsrv05w-4gdw.step/lm-pjsrv05w-4gdw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (3 pp, sha256
185d91e6eda19ce1, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM-PJSRV05W-4GDW
**Leiditech** · ESD And Surge Protection (TVS/ESD) · SOT-363
LM-PJSRV05W-4GDW from Leiditech, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected line 1 (steering-diode pair midpoint, bottom-left of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
| 2 | GND | power_in | Common ground, connected to the anode of the central TVS zener diode in the pin configuration diagram. |
| 3 | I/O2 | passive | Protected line 2 (steering-diode pair midpoint, bottom-right of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
| 4 | I/O3 | passive | Protected line 3 (steering-diode pair midpoint, top-right of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
| 5 | VCC | power_in | Connected to the cathode of the central TVS zener diode (positive rail of the steering diodes); 5V reverse working voltage (VRWM). |
| 6 | I/O4 | passive | Protected line 4 (steering-diode pair midpoint, top-left of the diagram), 5V working voltage, 0.8pF max junction capacitance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-363 |
| Category | Circuit Protection |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power (8/20µs) | Ppp | | | 100 | W | | 1 |
| ESD per IEC 61000-4-2 (Air) | VESD | -25 | | 25 | Kv | per IEC 61000-4-2 (Air) | 1 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -20 | | 20 | Kv | per IEC 61000-4-2 (Contact) | 1 |
| Operating Temperature Range | TJ | -55 | | 125 | ℃ | | 1 |
| Storage Temperature Range | TSTJ | -55 | | 150 | ℃ | | 1 |
| Reverse Working Voltage | VRWM | | 5 | | V | | 2 |
| Breakdown Voltage | VBR | | 6 | | V | IT = 1mA | 2 |
| Reverse Leakage Current | IR | | 0.5 | | µA | VRWM = 5V | 2 |
| Clamping Voltage (IPP = 1A) | VC | | 15 | | V | IPP = 1A (8 x 20 s pulse) | 2 |
| Clamping Voltage (IPP = 5A) | VC | | 20 | | V | IPP = 5A (8 x 20 s pulse) | 2 |
| Junction Capacitance | CJ | | 0.8 | | pF | V = 0V, f = 1MHz | 2 |
## CAD (KiCad official)
- Symbol: `LM-PJSRV05W-4GDW`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `lm-pjsrv05w-4gdw-etched.step` / `lm-pjsrv05w-4gdw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm-pjsrv05w-4gdw.step` / `lm-pjsrv05w-4gdw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603063396241985536) (3 pp, sha256 `185d91e6eda19ce1`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm-pjsrv05w-4gdw-datasheet.pdf)