component
LM-NZQA5V6AXV5T1G
Public Made by Adomby adom
Leiditech ESD And Surge Protection (TVS/ESD), SOT-553. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LM-NZQA5V6AXV5T1G
Leiditech · ESD And Surge Protection (TVS/ESD) · SOT-553
LM-NZQA5V6AXV5T1G from Leiditech, in a SOT-553. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected line 1 (TVS diode cathode, shown in the pin configuration diagram) with VRWM 5V, 8/20µs peak pulse power 60W and ±15kV air / ±8kV contact ESD per IEC 61000-4-2. |
| 2 | GND | power_in | Common ground node tied to the anodes of all four TVS diodes in the pin configuration diagram. |
| 3 | I/O2 | passive | Protected line 2 (TVS diode cathode, shown in the pin configuration diagram) with VRWM 5V, 8/20µs peak pulse power 60W and ±15kV air / ±8kV contact ESD per IEC 61000-4-2. |
| 4 | I/O3 | passive | Protected line 3 (TVS diode cathode, shown in the pin configuration diagram) with VRWM 5V, 8/20µs peak pulse power 60W and ±15kV air / ±8kV contact ESD per IEC 61000-4-2. |
| 5 | I/O4 | passive | Protected line 4 (TVS diode cathode, shown in the pin configuration diagram) with VRWM 5V, 8/20µs peak pulse power 60W and ±15kV air / ±8kV contact ESD per IEC 61000-4-2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-553 |
| Category | Circuit Protection |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Breakdown voltage | VBR | 6 | V | IT (mA) = 1 | 2 | ||
| Clamping voltage | VC | 9.8 | 12 | V | @1A | 2 | |
| Reverse leakage current | IR | 5 | μA | 2 | |||
| Capacitance | C | 0.5 | 0.7 | Pf | 2 | ||
| Peak pulse power | Ppp | 60 | W | 8/20µs | 1 | ||
| ESD per IEC 61000-4-2 (Air) | VESD | -15 | 15 | Kv | IEC 61000-4-2 (Air) | 1 | |
| ESD per IEC 61000-4-2 (Contact) | -8 | 8 | Kv | IEC 61000-4-2 (Contact) | 1 | ||
| Operating temperature range | TJ | -55 | 125 | ℃ | 1 | ||
| Storage temperature range | TSTJ | -55 | 150 | ℃ | 1 |
CAD (KiCad official)
- Symbol:
LM-NZQA5V6AXV5T1G - Footprint:
Package_TO_SOT_SMD:SOT-553 - 3D model: SOT-553 (KiCad packages3D, STEP)
- 3D model files:
lm-nzqa5v6axv5t1g-etched.step/lm-nzqa5v6axv5t1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm-nzqa5v6axv5t1g.step/lm-nzqa5v6axv5t1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (3 pp, sha256
09b1b1a642535b64, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).