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docs lks523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
lks523-etched.fit.json lks523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lks523-etched.glb lks523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lks523-etched.step lks523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lks523.glb Publish 0.1.0 · Ray
lks523.kicad_mod Publish 0.1.0 · Ray
lks523.kicad_sym Publish 0.1.0 · Ray
lks523.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
lks523.step Publish 0.1.0 · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray
README.md lks523: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

LKS523

LINKOSEMI · Isolators - Gate Drivers · SOP-8

LKS523 from LINKOSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low-side and logic supply voltage. Recommended operating range 10V to 20V (absolute max 25V). Provides the internal logic bias and low-side gate drive rail.
2 HIN input Logic input for the high-side driver channel. Compatible with 3.3V/5V/15V logic (VIH >= 2.4V, VIL <= 0.6V). Referenced to COM.
3 LIN input Logic input for the low-side driver channel. Compatible with 3.3V/5V/15V logic (VIH >= 2.4V, VIL <= 0.6V). Referenced to COM.
4 COM power_in Logic ground and low-side driver return. Common reference for VCC, HIN, LIN, and the LO output.
5 LO output Low-side gate driver output. Drives the gate of the low-side N-channel MOSFET/IGBT; swings between COM and VCC. Typical peak sink/source ~800mA/1.2A.
6 VS power_in High-side driver floating return (source of the high-side MOSFET / emitter of the IGBT). Offset voltage range -5V to 600V; allowable dVs/dt = 50 V/ns.
7 HO output High-side floating gate driver output. Drives the high-side N-channel MOSFET/IGBT gate; swings between VS and VB.
8 VB power_in High-side floating supply (bootstrap). Recommended VB = VS + 10V to VS + 20V (absolute max 625V referenced to COM). Typically supplied via a bootstrap diode and capacitor from VCC.

Key specifications

Parameter Value
Manufacturer LINKOSEMI
Package SOP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • LKS523

CAD (KiCad official)

  • Symbol: LKS523
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: lks523-etched.step / lks523-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lks523.step / lks523.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LINKOSEMI datasheet (12 pp, sha256 25023009ae00348c, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF