component
LKS32MC080R8T8
Public Made by Adomby adom
LINKOSEMI Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
LKS32MC080R8T8
LINKOSEMI · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
LKS32MC080R8T8 from LINKOSEMI, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADC_CH4/DAC_OUT/P0.0 | bidirectional | ADC channel 4, DAC output, or GPIO P0.0, with a 10k software-controllable built-in pull-up resistor. |
| 2 | ADC_CH6/P0.1 | bidirectional | ADC channel 6 or GPIO P0.1; no further electrical limits are stated for this pin. |
| 3 | RSTN/P0.2 | bidirectional | Reset input (RSTN) or GPIO P0.2 with a 100k built-in pull-up; a 100nF ground capacitor is required, and a 10k~20k pull-up between AVDD and RSTN on PCB is recommended (use a 100nF capacitor if that pull-up is present). |
| 4 | AVSS | power_in | System ground. |
| 5 | AVDD | power_in | Chip power input; an off-chip decoupling capacitor of at least 1uF is recommended, placed as close as possible to the AVDD pin. |
| 6 | P3.2 | bidirectional | General-purpose I/O P3.2; no further function or limit is stated in the datasheet. |
| 7 | P3.4 | bidirectional | General-purpose I/O P3.4; no further function or limit is stated in the datasheet. |
| 8 | SCL/TIM2_CH0/ADC_CH7/P0.3 | bidirectional | I2C clock, Timer2 channel 0, ADC channel 7, or GPIO P0.3. |
| 9 | SDA/TIM2_CH1/ADC_CH8/P0.4 | bidirectional | I2C data, Timer2 channel 1, ADC channel 8, or GPIO P0.4. |
| 10 | ADC_CH9/P0.5 | bidirectional | ADC channel 9 or GPIO P0.5. |
| 11 | UART1_TX(RX)/TIM1_CH0/CAN_RX/P0.6 | bidirectional | UART1 RXD, Timer1 channel 0, CAN RX, or GPIO P0.6, with a 10k software-controllable built-in pull-up resistor. |
| 12 | UART1_TX(RX)/TIM1_CH1/CAN_TX/P0.7 | bidirectional | UART1 TXD, Timer1 channel 1, CAN TX, or GPIO P0.7, with a 10k software-controllable built-in pull-up resistor. |
| 13 | SPI_CS/P1.1 | bidirectional | SPI chip select or GPIO P1.1; no further electrical limit is stated. |
| 14 | MCPWM_CH1P/TIM2_CH0/P2.11 | bidirectional | Motor PWM channel 1 high-side output, Timer2 channel 0, or GPIO P2.11. |
| 15 | MCPWM_CH1N/TIM2_CH1/ADC_TRIG2/P2.12 | bidirectional | Motor PWM channel 1 low-side output, Timer2 channel 1, ADC trigger signal 2, or GPIO P2.12. |
| 16 | P0.8 | bidirectional | General-purpose I/O P0.8; no further function or limit is stated in the datasheet. |
| 17 | SCL/TIM2_CH0/P0.9 | bidirectional | I2C clock, Timer2 channel 0, or GPIO P0.9. |
| 18 | SDA/TIM2_CH1/P0.10 | bidirectional | I2C data, Timer2 channel 1, or GPIO P0.10. |
| 19 | HALL_IN0/TIM3_CH0/ADC_CH15/CMP0_IP1/P0.11 | bidirectional | Hall sensor A-phase input, Timer3 channel 0, ADC channel 15, Comparator0 positive input 1, or GPIO P0.11. |
| 20 | HALL_IN1/TIM3_CH1/CAN_RX/ADC_CH16/CMP0_IP2/P0.12 | bidirectional | Hall sensor B-phase input, Timer3 channel 1, CAN RX, ADC channel 16, Comparator0 positive input 2, or GPIO P0.12. |
| 21 | HALL_IN2/CAN_TX/ADC_CH17/CMP0_IP3/P0.13 | bidirectional | Hall sensor C-phase input, CAN TX, ADC channel 17, Comparator0 positive input 3, or GPIO P0.13. |
| 22 | CMP0_OUT/MCPWM_BKIN1/SPI_CLK/TIM0_CH1/ADC_TRIG0/SIF/ADC_CH10/CMP0_IP4/P0.14 | bidirectional | Comparator0 output, motor PWM break signal 1, SPI clock, Timer0 channel 1, ADC trigger 0, SIF, ADC channel 10, Comparator0 positive input 4, or GPIO P0.14. |
| 23 | MCPWM_CH0P/UART0_TX(RX)/SPI_DI(DO)/TIM0_CH0/ADC_TRIG1/CMP0_IN/P0.15 | bidirectional | Motor PWM channel 0 high-side output, UART0 RX, SPI data output, Timer0 channel 0, ADC trigger 1, Comparator0 negative input, or GPIO P0.15. |
| 24 | MCPWM_CH0N/UART0_TX(RX)/SPI_DI(DO)/P1.0 | bidirectional | Motor PWM channel 0 low-side output, UART0 TX, SPI data input, or GPIO P1.0, with a 10k software-controllable built-in pull-up resistor. |
| 25 | P3.6 | bidirectional | General-purpose I/O P3.6; no further function or limit is stated in the datasheet. |
| 26 | TIM3_CH0/P1.2 | bidirectional | Timer3 channel 0 or GPIO P1.2. |
| 27 | TIM3_CH1/ADC_CH5/P1.3 | bidirectional | Timer3 channel 1, ADC channel 5, or GPIO P1.3, with a 10k software-controllable built-in pull-up resistor. |
| 28 | OPA0_IP/P3.5 | bidirectional | OPA0 positive input or GPIO P3.5. |
| 29 | OPA0_IN/P3.7 | bidirectional | OPA0 negative input or GPIO P3.7. |
| 30 | ADC_CH11/OPAx_OUT/LDO15/P2.7 | bidirectional | ADC channel 11, OPAx output, LDO15 output, or GPIO P2.7, with a 10k software-controllable built-in pull-up resistor. |
| 31 | OPA1_IP/P3.0 | bidirectional | OPA1 positive input or GPIO P3.0. |
| 32 | OPA1_IN/P3.1 | bidirectional | OPA1 negative input or GPIO P3.1. |
| 33 | UART1_TX(RX)/TIM3_CH0/OSC_IN/P2.8 | bidirectional | UART1 RX, Timer3 channel 0, crystal oscillator input, or GPIO P2.8, with a 10k software-controllable built-in pull-up resistor; if a crystal is connected, a 15pF capacitor to ground is to be added. |
| 34 | UART1_TX(RX)/TIM3_CH1/OSC_OUT/P3.9 | bidirectional | UART1 TX, Timer3 channel 1, crystal oscillator output, or GPIO P3.9, with a 10k software-controllable built-in pull-up resistor; if a crystal is connected, a 15pF capacitor to ground is to be added. |
| 35 | MCPWM_CH1N/P1.12 | input | Motor PWM channel 1 low-side output or GPIO P1.12 (listed as Input type in the pin function table). |
| 36 | SPI_CLK/TIM0_CH0/P1.13 | bidirectional | SPI clock, Timer0 channel 0, or GPIO P1.13. |
| 37 | SPI_DI(DO)/TIM0_CH1/P1.14 | input | SPI data output, Timer0 channel 1, or GPIO P1.14 (listed as Input type in the pin function table). |
| 38 | MCPWM_CH2N/P1.15 | bidirectional | Motor PWM channel 2 low-side output or GPIO P1.15. |
| 39 | SPI_CS/TIM2_CH1/P2.0 | bidirectional | SPI chip select, Timer2 channel 1, or GPIO P2.0. |
| 40 | LRC/MCPWM_CH0P/P1.4 | bidirectional | 32kHz RC clock output, motor PWM channel 0 high-side output, or GPIO P1.4. |
| 41 | HRC/MCPWM_CH0N/P1.5 | bidirectional | 4MHz RC clock output, motor PWM channel 0 low-side output, or GPIO P1.5. |
| 42 | MCPWM_CH1P/P1.6 | bidirectional | Motor PWM channel 1 high-side output or GPIO P1.6. |
| 43 | MCPWM_CH1N/P1.7 | bidirectional | Motor PWM channel 1 low-side output or GPIO P1.7. |
| 44 | MCPWM_CH2P/P1.8 | bidirectional | Motor PWM channel 2 high-side output or GPIO P1.8. |
| 45 | MCPWM_CH2N/P1.9 | bidirectional | Motor PWM channel 2 low-side output or GPIO P1.9. |
| 46 | ADC_CH13/MCPWM_CH3P/UART0_TX(RX)/SCL/TIM0_CH0/ADC_TRIG2/P1.10 | bidirectional | ADC channel 13, motor PWM channel 3 high-side output, UART0 RX, I2C clock, Timer0 channel 0, ADC trigger 2, or GPIO P1.10, with a 10k software-controllable built-in pull-up resistor. |
| 47 | MCPWM_CH3N/UART0_TX(RX)/SDA/TIM0_CH1/ADC_TRIG3/SIF/P1.11 | bidirectional | Motor PWM channel 3 low-side output, UART0 TX, I2C data, Timer0 channel 1, ADC trigger 3, SIF, or GPIO P1.11, with a 10k software-controllable built-in pull-up resistor. |
| 48 | OPA2_IP/P3.10 | bidirectional | OPA2 positive input or GPIO P3.10. |
| 49 | OPA2_IN/P3.11 | bidirectional | OPA2 negative input or GPIO P3.11. |
| 50 | SPI_DI(DO)/SCL/ADC_CH12/CMP0_IP0/P2.9 | bidirectional | SPI data input, I2C clock, ADC channel 12, Comparator0 positive input 0, or GPIO P2.9. |
| 51 | SPI_DI(DO)/SDA/P2.10 | bidirectional | SPI data output, I2C data, or GPIO P2.10, with a 10k software-controllable built-in pull-up resistor. |
| 52 | OPA3_IN/P3.14 | bidirectional | OPA3 negative input or GPIO P3.14. |
| 53 | OPA3_IP/P3.15 | bidirectional | OPA3 positive input or GPIO P3.15. |
| 54 | SPI_CLK/ADC_CH14/CMP1_IP0/P2.1 | bidirectional | SPI clock, ADC channel 14, Comparator1 positive input 0, or GPIO P2.1, with a 10k software-controllable built-in pull-up resistor. |
| 55 | CMP1_IN/P2.2 | bidirectional | Comparator1 negative input or GPIO P2.2. |
| 56 | CMP1_OUT/MCPWM_BKIN0/SPI_CS/REF/P2.3 | bidirectional | Comparator1 output, motor PWM break signal 0, SPI chip select, voltage reference, or GPIO P2.3. |
| 57 | HALL_IN0/MCPWM_CH2P/UART1_TX(RX)/TIM1_CH0/ADC_TRIG3/CAN_RX/CMP1_IP1/P2.4 | bidirectional | Hall sensor A-phase input, motor PWM channel 2 high-side output, UART1 RX, Timer1 channel 0, ADC trigger 3, CAN RX, Comparator1 positive input 1, or GPIO P2.4, with a 10k software-controllable built-in pull-up resistor. |
| 58 | HALL_IN1/MCPWM_CH2N/UART1_TX(RX)/TIM1_CH1/ADC_TRIG0/CAN_TX/CMP1_IP2/P2.5 | bidirectional | Hall sensor B-phase input, motor PWM channel 2 low-side output, UART1 TX, Timer1 channel 1, ADC trigger 0, CAN TX, Comparator1 positive input 2, or GPIO P2.5, with a 10k software-controllable built-in pull-up resistor. |
| 59 | HALL_IN2/MCPWM_CH3P/TIM3_CH0/ADC_TRIG1/CMP1_IP3/P2.6 | bidirectional | Hall sensor C-phase input, motor PWM channel 3 high-side output, Timer3 channel 0, ADC trigger 1, Comparator1 positive input 3, or GPIO P2.6, with a 10k software-controllable built-in pull-up resistor. |
| 60 | MCPWM_CH3N/TIM3_CH1/P2.13 | bidirectional | Motor PWM channel 3 low-side output, Timer3 channel 1, or GPIO P2.13. |
| 61 | SWCLK | input | SWD clock input, with a 10k built-in pull-up resistor. |
| 62 | SWDIO | bidirectional | SWD data input/output, with a 10k built-in pull-up resistor. |
| 63 | SCL/P2.14 | bidirectional | I2C clock or GPIO P2.14. |
| 64 | SDA/P2.15 | bidirectional | I2C data or GPIO P2.15. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LINKOSEMI |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage (AVDD) | AVDD | -0.3 | 6 | V | 37 | ||
| Operating Temperature | -40 | 105 | ˚C | 37 | |||
| Storage Temperature | -40 | 150 | ˚C | 37 | |||
| Junction Temperature | 150 | °C | 37 | ||||
| Pin Temperature (solder for10 seconds) | 260 | °C | solder for 10 seconds | 37 | |||
| ESD test (HBM) | -6000 | 6000 | V | HBM, MIL-STD-883J Method 3015.9 | 37 | ||
| Latch-up current (85℃) | -200 | 200 | mA | 85℃ | 37 | ||
| GPIO Signal Input Voltage Range | VIN-GPIO | -0.3 | 6 | V | 37 | ||
| Maximum Injection Current of a Single GPIO | IINJ_PAD | -11.2 | 11.2 | mA | 37 | ||
| Maximum Injection Current of All GPIOs | IINJ_SUM | -50 | 50 | mA | 38 | ||
| Power supply voltage (AVDD) | AVDD | 2.2 | 5.5 | V | 37 | ||
| Analog power voltage (AVDDA) | AVDDA | 3.3 | 5 | 5.5 | V | ADC use 2.4V internal reference | 37 |
| Analog power voltage (AVDDA) | AVDDA | 2.8 | 5 | 5.5 | V | ADC use 1.2V internal reference | 37 |
| High input level of digital IO | VIH | 2 | V | AVDD 3.3V | 38 | ||
| Low input level of digital IO | VIL | 0.8 | V | AVDD 3.3V | 38 | ||
| Digital IO current consumption when input is high | IIH | 1 | uA | Input high; AVDD 5V or 3.3V | 38 | ||
| Digital IO current consumption when input is low | IIL | -1 | uA | Input low; AVDD 5V or 3.3V | 38 | ||
| Low output level of digital IO | VOL | 0.5 | V | Current = 11.2mA | 38 | ||
| Pull-up resistor (Reset pin) | Rpup | 100 | 200 | 400 | kΩ | 38 | |
| Pull-up resistor (Normal pin) | Rpup | 8 | 10 | 12 | kΩ | 38 | |
| Connection resistance between IO and internal analog circuit | Rio-ana | 100 | 200 | Ω | 38 | ||
| Digital IO Input-capacitance | CIN | 10 | pF | AVDD 5V or 3.3V | 38 | ||
| Comparator x1 | 0.005 | mA | 38 | ||||
| OPA x1 | 0.45 | mA | 38 | ||||
| ADC | 3.71 | mA | 38 | ||||
| DAC | 0.71 | mA | 38 | ||||
| Temp Sensor | 0.15 | mA | 38 | ||||
| Band-Gap | 0.154 | mA | 38 | ||||
| 4MHz RC Clock | 0.105 | mA | 38 | ||||
| PLL | 0.08 | mA | 39 | ||||
| CPU+flash+SRAM (96MHz) | 8.667 | mA | 39 | ||||
| CPU+flash+SRAM (12MHz) | 1.6 | mA | 39 | ||||
| CRC | 0.07 | mA | 39 | ||||
| DSP | 3.421 | mA | 39 | ||||
| UART | 0.107 | mA | 39 | ||||
| DMA | 1.34 | mA | 39 | ||||
| MCPWM | 0.053 | mA | 39 | ||||
| TIMER | 0.269 | mA | 39 | ||||
| SPI | 0.5 | mA | 39 | ||||
| IIC | 0.5 | mA | 39 | ||||
| CAN | 2.2 | mA | 39 | ||||
| Sleep Mode | 10 | 30 | 50 | uA | 39 | ||
| Power Supply (ADC) | 2.8 | 5 | 5.5 | V | ADC use 2.4V internal reference | 40 | |
| Power Supply (ADC) | 3.3 | 5 | 5.5 | V | ADC use 1.2V internal reference | 40 | |
| Differential Input Signal Range | -3.6 | 3.6 | V | Gain=2/3; REF=2.4V | 40 | ||
| DC offset | 5 | 10 | mV | Correctable | 40 | ||
| Effective number of bits (ENOB) | ENOB | 10.5 | 11 | bit | 40 | ||
| ADC INL | INL | 2 | 3 | LSB | 40 | ||
| ADC DNL | DNL | 1 | 2 | LSB | 40 | ||
| ADC SNR | SNR | 63 | 66 | dB | 40 | ||
| Reference Power Supply | 2.2 | 5 | 5.5 | V | 40 | ||
| Reference Output Deviation | -9 | 9 | mV | 40 | |||
| DAC Power Supply | 2.2 | 5 | 5.5 | V | 40 | ||
| DAC DNL | DNL | 1 | 2 | LSB | 40 | ||
| DAC INL | INL | 2 | 4 | LSB | 40 | ||
| DAC OFFSET | 5 | 10 | mV | 40 | |||
| Operational Amplifier Power Supply | 2.8 | 5 | 5.5 | V | 40 | ||
| Common Mode Voltage (Vcm) | Vcm | 1.65 | 1.9 | 2.2 | V | Measurement condition: normal temperature. | 41 |
| OPA OFFSET | 10 | 15 | mV | 41 | |||
| Comparator Power Supply | 2.2 | 5 | 5.5 | V | 41 |
CAD (KiCad official)
- Symbol:
LKS32MC080R8T8 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
lks32mc080r8t8-etched.step/lks32mc080r8t8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lks32mc080r8t8.step/lks32mc080r8t8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LINKOSEMI datasheet (62 pp, sha256
7b78dfde946cf540, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LKS32MC080R8T8
**LINKOSEMI** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
LKS32MC080R8T8 from LINKOSEMI, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADC_CH4/DAC_OUT/P0.0 | bidirectional | ADC channel 4, DAC output, or GPIO P0.0, with a 10k software-controllable built-in pull-up resistor. |
| 2 | ADC_CH6/P0.1 | bidirectional | ADC channel 6 or GPIO P0.1; no further electrical limits are stated for this pin. |
| 3 | RSTN/P0.2 | bidirectional | Reset input (RSTN) or GPIO P0.2 with a 100k built-in pull-up; a 100nF ground capacitor is required, and a 10k~20k pull-up between AVDD and RSTN on PCB is recommended (use a 100nF capacitor if that pull-up is present). |
| 4 | AVSS | power_in | System ground. |
| 5 | AVDD | power_in | Chip power input; an off-chip decoupling capacitor of at least 1uF is recommended, placed as close as possible to the AVDD pin. |
| 6 | P3.2 | bidirectional | General-purpose I/O P3.2; no further function or limit is stated in the datasheet. |
| 7 | P3.4 | bidirectional | General-purpose I/O P3.4; no further function or limit is stated in the datasheet. |
| 8 | SCL/TIM2_CH0/ADC_CH7/P0.3 | bidirectional | I2C clock, Timer2 channel 0, ADC channel 7, or GPIO P0.3. |
| 9 | SDA/TIM2_CH1/ADC_CH8/P0.4 | bidirectional | I2C data, Timer2 channel 1, ADC channel 8, or GPIO P0.4. |
| 10 | ADC_CH9/P0.5 | bidirectional | ADC channel 9 or GPIO P0.5. |
| 11 | UART1_TX(RX)/TIM1_CH0/CAN_RX/P0.6 | bidirectional | UART1 RXD, Timer1 channel 0, CAN RX, or GPIO P0.6, with a 10k software-controllable built-in pull-up resistor. |
| 12 | UART1_TX(RX)/TIM1_CH1/CAN_TX/P0.7 | bidirectional | UART1 TXD, Timer1 channel 1, CAN TX, or GPIO P0.7, with a 10k software-controllable built-in pull-up resistor. |
| 13 | SPI_CS/P1.1 | bidirectional | SPI chip select or GPIO P1.1; no further electrical limit is stated. |
| 14 | MCPWM_CH1P/TIM2_CH0/P2.11 | bidirectional | Motor PWM channel 1 high-side output, Timer2 channel 0, or GPIO P2.11. |
| 15 | MCPWM_CH1N/TIM2_CH1/ADC_TRIG2/P2.12 | bidirectional | Motor PWM channel 1 low-side output, Timer2 channel 1, ADC trigger signal 2, or GPIO P2.12. |
| 16 | P0.8 | bidirectional | General-purpose I/O P0.8; no further function or limit is stated in the datasheet. |
| 17 | SCL/TIM2_CH0/P0.9 | bidirectional | I2C clock, Timer2 channel 0, or GPIO P0.9. |
| 18 | SDA/TIM2_CH1/P0.10 | bidirectional | I2C data, Timer2 channel 1, or GPIO P0.10. |
| 19 | HALL_IN0/TIM3_CH0/ADC_CH15/CMP0_IP1/P0.11 | bidirectional | Hall sensor A-phase input, Timer3 channel 0, ADC channel 15, Comparator0 positive input 1, or GPIO P0.11. |
| 20 | HALL_IN1/TIM3_CH1/CAN_RX/ADC_CH16/CMP0_IP2/P0.12 | bidirectional | Hall sensor B-phase input, Timer3 channel 1, CAN RX, ADC channel 16, Comparator0 positive input 2, or GPIO P0.12. |
| 21 | HALL_IN2/CAN_TX/ADC_CH17/CMP0_IP3/P0.13 | bidirectional | Hall sensor C-phase input, CAN TX, ADC channel 17, Comparator0 positive input 3, or GPIO P0.13. |
| 22 | CMP0_OUT/MCPWM_BKIN1/SPI_CLK/TIM0_CH1/ADC_TRIG0/SIF/ADC_CH10/CMP0_IP4/P0.14 | bidirectional | Comparator0 output, motor PWM break signal 1, SPI clock, Timer0 channel 1, ADC trigger 0, SIF, ADC channel 10, Comparator0 positive input 4, or GPIO P0.14. |
| 23 | MCPWM_CH0P/UART0_TX(RX)/SPI_DI(DO)/TIM0_CH0/ADC_TRIG1/CMP0_IN/P0.15 | bidirectional | Motor PWM channel 0 high-side output, UART0 RX, SPI data output, Timer0 channel 0, ADC trigger 1, Comparator0 negative input, or GPIO P0.15. |
| 24 | MCPWM_CH0N/UART0_TX(RX)/SPI_DI(DO)/P1.0 | bidirectional | Motor PWM channel 0 low-side output, UART0 TX, SPI data input, or GPIO P1.0, with a 10k software-controllable built-in pull-up resistor. |
| 25 | P3.6 | bidirectional | General-purpose I/O P3.6; no further function or limit is stated in the datasheet. |
| 26 | TIM3_CH0/P1.2 | bidirectional | Timer3 channel 0 or GPIO P1.2. |
| 27 | TIM3_CH1/ADC_CH5/P1.3 | bidirectional | Timer3 channel 1, ADC channel 5, or GPIO P1.3, with a 10k software-controllable built-in pull-up resistor. |
| 28 | OPA0_IP/P3.5 | bidirectional | OPA0 positive input or GPIO P3.5. |
| 29 | OPA0_IN/P3.7 | bidirectional | OPA0 negative input or GPIO P3.7. |
| 30 | ADC_CH11/OPAx_OUT/LDO15/P2.7 | bidirectional | ADC channel 11, OPAx output, LDO15 output, or GPIO P2.7, with a 10k software-controllable built-in pull-up resistor. |
| 31 | OPA1_IP/P3.0 | bidirectional | OPA1 positive input or GPIO P3.0. |
| 32 | OPA1_IN/P3.1 | bidirectional | OPA1 negative input or GPIO P3.1. |
| 33 | UART1_TX(RX)/TIM3_CH0/OSC_IN/P2.8 | bidirectional | UART1 RX, Timer3 channel 0, crystal oscillator input, or GPIO P2.8, with a 10k software-controllable built-in pull-up resistor; if a crystal is connected, a 15pF capacitor to ground is to be added. |
| 34 | UART1_TX(RX)/TIM3_CH1/OSC_OUT/P3.9 | bidirectional | UART1 TX, Timer3 channel 1, crystal oscillator output, or GPIO P3.9, with a 10k software-controllable built-in pull-up resistor; if a crystal is connected, a 15pF capacitor to ground is to be added. |
| 35 | MCPWM_CH1N/P1.12 | input | Motor PWM channel 1 low-side output or GPIO P1.12 (listed as Input type in the pin function table). |
| 36 | SPI_CLK/TIM0_CH0/P1.13 | bidirectional | SPI clock, Timer0 channel 0, or GPIO P1.13. |
| 37 | SPI_DI(DO)/TIM0_CH1/P1.14 | input | SPI data output, Timer0 channel 1, or GPIO P1.14 (listed as Input type in the pin function table). |
| 38 | MCPWM_CH2N/P1.15 | bidirectional | Motor PWM channel 2 low-side output or GPIO P1.15. |
| 39 | SPI_CS/TIM2_CH1/P2.0 | bidirectional | SPI chip select, Timer2 channel 1, or GPIO P2.0. |
| 40 | LRC/MCPWM_CH0P/P1.4 | bidirectional | 32kHz RC clock output, motor PWM channel 0 high-side output, or GPIO P1.4. |
| 41 | HRC/MCPWM_CH0N/P1.5 | bidirectional | 4MHz RC clock output, motor PWM channel 0 low-side output, or GPIO P1.5. |
| 42 | MCPWM_CH1P/P1.6 | bidirectional | Motor PWM channel 1 high-side output or GPIO P1.6. |
| 43 | MCPWM_CH1N/P1.7 | bidirectional | Motor PWM channel 1 low-side output or GPIO P1.7. |
| 44 | MCPWM_CH2P/P1.8 | bidirectional | Motor PWM channel 2 high-side output or GPIO P1.8. |
| 45 | MCPWM_CH2N/P1.9 | bidirectional | Motor PWM channel 2 low-side output or GPIO P1.9. |
| 46 | ADC_CH13/MCPWM_CH3P/UART0_TX(RX)/SCL/TIM0_CH0/ADC_TRIG2/P1.10 | bidirectional | ADC channel 13, motor PWM channel 3 high-side output, UART0 RX, I2C clock, Timer0 channel 0, ADC trigger 2, or GPIO P1.10, with a 10k software-controllable built-in pull-up resistor. |
| 47 | MCPWM_CH3N/UART0_TX(RX)/SDA/TIM0_CH1/ADC_TRIG3/SIF/P1.11 | bidirectional | Motor PWM channel 3 low-side output, UART0 TX, I2C data, Timer0 channel 1, ADC trigger 3, SIF, or GPIO P1.11, with a 10k software-controllable built-in pull-up resistor. |
| 48 | OPA2_IP/P3.10 | bidirectional | OPA2 positive input or GPIO P3.10. |
| 49 | OPA2_IN/P3.11 | bidirectional | OPA2 negative input or GPIO P3.11. |
| 50 | SPI_DI(DO)/SCL/ADC_CH12/CMP0_IP0/P2.9 | bidirectional | SPI data input, I2C clock, ADC channel 12, Comparator0 positive input 0, or GPIO P2.9. |
| 51 | SPI_DI(DO)/SDA/P2.10 | bidirectional | SPI data output, I2C data, or GPIO P2.10, with a 10k software-controllable built-in pull-up resistor. |
| 52 | OPA3_IN/P3.14 | bidirectional | OPA3 negative input or GPIO P3.14. |
| 53 | OPA3_IP/P3.15 | bidirectional | OPA3 positive input or GPIO P3.15. |
| 54 | SPI_CLK/ADC_CH14/CMP1_IP0/P2.1 | bidirectional | SPI clock, ADC channel 14, Comparator1 positive input 0, or GPIO P2.1, with a 10k software-controllable built-in pull-up resistor. |
| 55 | CMP1_IN/P2.2 | bidirectional | Comparator1 negative input or GPIO P2.2. |
| 56 | CMP1_OUT/MCPWM_BKIN0/SPI_CS/REF/P2.3 | bidirectional | Comparator1 output, motor PWM break signal 0, SPI chip select, voltage reference, or GPIO P2.3. |
| 57 | HALL_IN0/MCPWM_CH2P/UART1_TX(RX)/TIM1_CH0/ADC_TRIG3/CAN_RX/CMP1_IP1/P2.4 | bidirectional | Hall sensor A-phase input, motor PWM channel 2 high-side output, UART1 RX, Timer1 channel 0, ADC trigger 3, CAN RX, Comparator1 positive input 1, or GPIO P2.4, with a 10k software-controllable built-in pull-up resistor. |
| 58 | HALL_IN1/MCPWM_CH2N/UART1_TX(RX)/TIM1_CH1/ADC_TRIG0/CAN_TX/CMP1_IP2/P2.5 | bidirectional | Hall sensor B-phase input, motor PWM channel 2 low-side output, UART1 TX, Timer1 channel 1, ADC trigger 0, CAN TX, Comparator1 positive input 2, or GPIO P2.5, with a 10k software-controllable built-in pull-up resistor. |
| 59 | HALL_IN2/MCPWM_CH3P/TIM3_CH0/ADC_TRIG1/CMP1_IP3/P2.6 | bidirectional | Hall sensor C-phase input, motor PWM channel 3 high-side output, Timer3 channel 0, ADC trigger 1, Comparator1 positive input 3, or GPIO P2.6, with a 10k software-controllable built-in pull-up resistor. |
| 60 | MCPWM_CH3N/TIM3_CH1/P2.13 | bidirectional | Motor PWM channel 3 low-side output, Timer3 channel 1, or GPIO P2.13. |
| 61 | SWCLK | input | SWD clock input, with a 10k built-in pull-up resistor. |
| 62 | SWDIO | bidirectional | SWD data input/output, with a 10k built-in pull-up resistor. |
| 63 | SCL/P2.14 | bidirectional | I2C clock or GPIO P2.14. |
| 64 | SDA/P2.15 | bidirectional | I2C data or GPIO P2.15. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LINKOSEMI |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage (AVDD) | AVDD | -0.3 | | 6 | V | | 37 |
| Operating Temperature | | -40 | | 105 | ˚C | | 37 |
| Storage Temperature | | -40 | | 150 | ˚C | | 37 |
| Junction Temperature | | | | 150 | °C | | 37 |
| Pin Temperature (solder for10 seconds) | | | | 260 | °C | solder for 10 seconds | 37 |
| ESD test (HBM) | | -6000 | | 6000 | V | HBM, MIL-STD-883J Method 3015.9 | 37 |
| Latch-up current (85℃) | | -200 | | 200 | mA | 85℃ | 37 |
| GPIO Signal Input Voltage Range | VIN-GPIO | -0.3 | | 6 | V | | 37 |
| Maximum Injection Current of a Single GPIO | IINJ_PAD | -11.2 | | 11.2 | mA | | 37 |
| Maximum Injection Current of All GPIOs | IINJ_SUM | -50 | | 50 | mA | | 38 |
| Power supply voltage (AVDD) | AVDD | 2.2 | | 5.5 | V | | 37 |
| Analog power voltage (AVDDA) | AVDDA | 3.3 | 5 | 5.5 | V | ADC use 2.4V internal reference | 37 |
| Analog power voltage (AVDDA) | AVDDA | 2.8 | 5 | 5.5 | V | ADC use 1.2V internal reference | 37 |
| High input level of digital IO | VIH | 2 | | | V | AVDD 3.3V | 38 |
| Low input level of digital IO | VIL | | | 0.8 | V | AVDD 3.3V | 38 |
| Digital IO current consumption when input is high | IIH | | | 1 | uA | Input high; AVDD 5V or 3.3V | 38 |
| Digital IO current consumption when input is low | IIL | | | -1 | uA | Input low; AVDD 5V or 3.3V | 38 |
| Low output level of digital IO | VOL | | | 0.5 | V | Current = 11.2mA | 38 |
| Pull-up resistor (Reset pin) | Rpup | 100 | 200 | 400 | kΩ | | 38 |
| Pull-up resistor (Normal pin) | Rpup | 8 | 10 | 12 | kΩ | | 38 |
| Connection resistance between IO and internal analog circuit | Rio-ana | 100 | | 200 | Ω | | 38 |
| Digital IO Input-capacitance | CIN | | | 10 | pF | AVDD 5V or 3.3V | 38 |
| Comparator x1 | | | | 0.005 | mA | | 38 |
| OPA x1 | | | | 0.45 | mA | | 38 |
| ADC | | | | 3.71 | mA | | 38 |
| DAC | | | | 0.71 | mA | | 38 |
| Temp Sensor | | | | 0.15 | mA | | 38 |
| Band-Gap | | | | 0.154 | mA | | 38 |
| 4MHz RC Clock | | | | 0.105 | mA | | 38 |
| PLL | | | | 0.08 | mA | | 39 |
| CPU+flash+SRAM (96MHz) | | | | 8.667 | mA | | 39 |
| CPU+flash+SRAM (12MHz) | | | | 1.6 | mA | | 39 |
| CRC | | | | 0.07 | mA | | 39 |
| DSP | | | | 3.421 | mA | | 39 |
| UART | | | | 0.107 | mA | | 39 |
| DMA | | | | 1.34 | mA | | 39 |
| MCPWM | | | | 0.053 | mA | | 39 |
| TIMER | | | | 0.269 | mA | | 39 |
| SPI | | | | 0.5 | mA | | 39 |
| IIC | | | | 0.5 | mA | | 39 |
| CAN | | | | 2.2 | mA | | 39 |
| Sleep Mode | | 10 | 30 | 50 | uA | | 39 |
| Power Supply (ADC) | | 2.8 | 5 | 5.5 | V | ADC use 2.4V internal reference | 40 |
| Power Supply (ADC) | | 3.3 | 5 | 5.5 | V | ADC use 1.2V internal reference | 40 |
| Differential Input Signal Range | | -3.6 | | 3.6 | V | Gain=2/3; REF=2.4V | 40 |
| DC offset | | | 5 | 10 | mV | Correctable | 40 |
| Effective number of bits (ENOB) | ENOB | 10.5 | 11 | | bit | | 40 |
| ADC INL | INL | | 2 | 3 | LSB | | 40 |
| ADC DNL | DNL | | 1 | 2 | LSB | | 40 |
| ADC SNR | SNR | 63 | 66 | | dB | | 40 |
| Reference Power Supply | | 2.2 | 5 | 5.5 | V | | 40 |
| Reference Output Deviation | | -9 | | 9 | mV | | 40 |
| DAC Power Supply | | 2.2 | 5 | 5.5 | V | | 40 |
| DAC DNL | DNL | | 1 | 2 | LSB | | 40 |
| DAC INL | INL | | 2 | 4 | LSB | | 40 |
| DAC OFFSET | | | 5 | 10 | mV | | 40 |
| Operational Amplifier Power Supply | | 2.8 | 5 | 5.5 | V | | 40 |
| Common Mode Voltage (Vcm) | Vcm | 1.65 | 1.9 | 2.2 | V | Measurement condition: normal temperature. | 41 |
| OPA OFFSET | | | 10 | 15 | mV | | 41 |
| Comparator Power Supply | | 2.2 | 5 | 5.5 | V | | 41 |
## CAD (KiCad official)
- Symbol: `LKS32MC080R8T8`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `lks32mc080r8t8-etched.step` / `lks32mc080r8t8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lks32mc080r8t8.step` / `lks32mc080r8t8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LINKOSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589839550350077952) (62 pp, sha256 `7b78dfde946cf540`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lks32mc080r8t8-datasheet.pdf)