component
LKS32MC051C6T8
Public Made by Adomby adom
LINKOSEMI Other Processors and Microcontrollers (MCUs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLKS32MC051C6T8
LINKOSEMI · Other Processors and Microcontrollers (MCUs) · TQFP-48(7x7)
LKS32MC051C6T8 from LINKOSEMI, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.0 | bidirectional | PULL_UP/WK/EXTI/ADC_CH4/DAC_OUT/P0.0: GPIO with wake-up, external interrupt, ADC channel 4 and DAC output, with a software-enabled internal 10k pull-up. |
| 2 | P0.2/RSTN | bidirectional | Used as RSTN by default (internal 100k pull-up; external 10nF~100nF capacitor to ground, or 100nF if an external pull-up is used), can be multiplexed as SPI_DI(DO)/P0.2. |
| 3 | AVSS | power_in | System ground. |
| 4 | AVDD | power_in | Chip power input, 2.2~5.5V, with a decoupling capacitor of at least 1uF placed close to the pin. |
| 5 | P0.1 | bidirectional | WK/EXTI/P0.1: GPIO with wake-up and external interrupt function. |
| 6 | P0.3 | bidirectional | PULL_UP/EXTI/SCL/TIM2_CH0/ADC_CH7/P0.3: GPIO with external interrupt, IIC clock, Timer2 channel 0 and ADC channel 7, with a software-enabled 10k pull-up. |
| 7 | P0.4 | bidirectional | PULL_UP/EXTI/SDA/TIM2_CH1/ADC_CH13/P0.4: GPIO with external interrupt, IIC data, Timer2 channel 1 and ADC channel 13, with a software-enabled 10k pull-up. |
| 8 | P0.5 | bidirectional | PULL_UP/EXTI/ADC_CH12/P0.5: GPIO with external interrupt and ADC channel 12, with a software-enabled 10k pull-up. |
| 9 | P0.6 | bidirectional | PULL_UP/EXTI/UART1_TX(RX)/TIM1_CH0/P0.6: GPIO with external interrupt, UART1 TX/RX and Timer1 channel 0, with a software-enabled 10k pull-up. |
| 10 | P0.7 | bidirectional | PULL_UP/EXTI/UART1_TX(RX)/TIM1_CH1/P0.7: GPIO with external interrupt, UART1 TX/RX and Timer1 channel 1, with a software-enabled 10k pull-up. |
| 11 | P2.11 | bidirectional | EXTI/MCPWM_CH1P/TIM2_CH0/P2.11: GPIO with external interrupt, motor PWM channel 1 high side and Timer2 channel 0. |
| 12 | P2.12 | bidirectional | SPI_CS/MCPWM_CH1N/TIM2_CH1/ADC_TRIG2/P2.12: GPIO with SPI chip select, motor PWM channel 1 low side, Timer2 channel 1 and ADC trigger 2. |
| 13 | P0.11 | bidirectional | PULL_UP/EXTI/HALL_IN0/TIM3_CH0/ADC_CH6/CMP0_IP1/SCL/P0.11: GPIO with Hall A input, Timer3 channel 0, ADC channel 6, comparator 0 positive input 1 and IIC clock, with a software-enabled 10k pull-up. |
| 14 | P0.12 | bidirectional | PULL_UP/EXTI/HALL_IN1/TIM3_CH1/ADC_CH2/CMP0_IP2/SDA/P0.12: GPIO with Hall B input, Timer3 channel 1, ADC channel 2, comparator 0 positive input 2 and IIC data, with a software-enabled 10k pull-up. |
| 15 | P0.13 | bidirectional | EXTI/HALL_IN2/ADC_CH3/CMP0_IP3/P0.13: GPIO with external interrupt, Hall C input, ADC channel 3 and comparator 0 positive input 3. |
| 16 | P0.14 | bidirectional | PULL_UP/EXTI/CMP0_OUT/MCPWM_BKIN1/UART0_TX(RX)/SPI_CLK/SCL/TIM0_CH1/ADC_TRIG0/ADC_CH10/CMP0_IP4/P0.14: multifunction GPIO with a software-enabled 10k pull-up. |
| 17 | P0.15 | bidirectional | PULL_UP/EXTI/MCPWM_CH0P/UART0_TX(RX)/SPI_DI(DO)/SDA/TIM0_CH0/ADC_TRIG1/CMP0_IN/P0.15: multifunction GPIO with a software-enabled 10k pull-up. |
| 18 | P1.0 | bidirectional | PULL_UP/WK/MCPWM_CH0N/UART0_TX(RX)/SPI_DI(DO)/P1.0: GPIO with wake-up, motor PWM channel 0 low side, UART0 and SPI, with a software-enabled 10k pull-up. |
| 19 | P1.3 | bidirectional | PULL_UP/TIM3_CH1/ADC_CH5/P1.3: GPIO with Timer3 channel 1 and ADC channel 5, with a software-enabled 10k pull-up. |
| 20 | P1.1 | bidirectional | WK/OPA2_IP/SPI_CS/P1.1: GPIO with wake-up, op-amp 2 positive input and SPI_CS. |
| 21 | P1.2 | bidirectional | OPA2_IN/TIM3_CH0/P1.2: GPIO with op-amp 2 negative input and Timer3 channel 0. |
| 22 | P2.7 | bidirectional | PULL_UP/ADC_CH11/OPAx_OUT/LDO15/P2.7: GPIO with ADC channel 11, op-amp output and LDO15 output, with a software-enabled 10k pull-up. |
| 23 | P2.14 | bidirectional | OPA3_IP/SPI_DI(DO)/SCL/P2.14: GPIO with op-amp 3 positive input, SPI_DI(DO) and IIC clock. |
| 24 | P2.15 | bidirectional | PULL_UP/OPA3_IN/SPI_CS/SDA/P2.15: GPIO with op-amp 3 negative input, SPI_CS and IIC data, with a software-enabled 10k pull-up. |
| 25 | P2.8 | bidirectional | UART0_TX(RX)/SPI_DI(DO)/TIM2_CH0/P2.8: GPIO with UART0, SPI_DI(DO) and Timer2 channel 0. |
| 26 | P1.13 | bidirectional | SPI_CLK/TIM0_CH0/P1.13: GPIO with SPI clock and Timer0 channel 0. |
| 27 | P1.4 | bidirectional | LRC/MCPWM_CH0P/P1.4: GPIO with 64KHz RC clock output and motor PWM channel 0 high side. |
| 28 | P1.5 | bidirectional | HRC/MCPWM_CH0N/P1.5: GPIO with 4MHz RC clock output and motor PWM channel 0 low side. |
| 29 | P1.6 | bidirectional | MCPWM_CH1P/P1.6: GPIO with motor PWM channel 1 high side. |
| 30 | P1.7 | bidirectional | MCPWM_CH1N/P1.7: GPIO with motor PWM channel 1 low side. |
| 31 | P1.8 | bidirectional | MCPWM_CH2P/P1.8: GPIO with motor PWM channel 2 high side. |
| 32 | P1.9 | bidirectional | MCPWM_CH2N/P1.9: GPIO with motor PWM channel 2 low side. |
| 33 | P1.10 | bidirectional | MCPWM_CH3P/UART0_TX(RX)/SCL/TIM0_CH0/ADC_TRIG2/P1.10: GPIO with motor PWM channel 3 high side, UART0, IIC clock, Timer0 channel 0 and ADC trigger 2. |
| 34 | P1.11 | bidirectional | PULL_UP/MCPWM_CH3N/UART0_TX(RX)/SDA/TIM0_CH1/ADC_TRIG3/SIF/P1.11: GPIO with motor PWM channel 3 low side, UART0, IIC data, Timer0 channel 1 and ADC trigger 3, with a software-enabled 10k pull-up. |
| 35 | P1.14 | bidirectional | OPA0_IP/P1.14: GPIO with op-amp 0 positive input. |
| 36 | P1.15 | bidirectional | OPA0_IN/P1.15: GPIO with op-amp 0 negative input. |
| 37 | P2.9 | bidirectional | PULL_UP/SPI_DI(DO)/SCL/ADC_CH9/CMP0_IP0/P2.9: GPIO with SPI, IIC clock, ADC channel 9 and comparator 0 positive input 0, with a software-enabled 10k pull-up; on the 051 ADC channel 9 actually samples the OPA2 output. |
| 38 | P2.10 | bidirectional | PULL_UP/SPI_DI(DO)/SDA/P2.10: GPIO with SPI_DI(DO) and IIC data, with a software-enabled 10k pull-up. |
| 39 | P0.9 | bidirectional | OPA1_IN/P0.9: GPIO with op-amp 1 negative input. |
| 40 | P0.10 | bidirectional | OPA1_IP/P0.10: GPIO with op-amp 1 positive input. |
| 41 | P2.1 | bidirectional | PULL_UP/SPI_CLK/ADC_CH8/CMP1_IP0/P2.1: GPIO with SPI clock, ADC channel 8 and comparator 1 positive input 0, with a software-enabled 10k pull-up; on the 051 ADC channel 8 actually samples the OPA2 output. |
| 42 | P2.2 | bidirectional | CMP1_IN/P2.2: GPIO with comparator 1 negative input. |
| 43 | P2.3 | bidirectional | CMP1_OUT/REF/MCPWM_BKIN0/SPI_CS/TIM0_CH1/P2.3: GPIO with comparator 1 output, voltage reference output, motor PWM brake input 0, SPI chip select and Timer0 channel 1. |
| 44 | P2.4 | bidirectional | PULL_UP/CMP0_OUT/HALL_IN0/MCPWM_CH2P/UART1_TX(RX)/TIM1_CH0/ADC_TRIG3/CMP1_IP1/P2.4: multifunction GPIO with a software-enabled 10k pull-up. |
| 45 | P2.5 | bidirectional | PULL_UP/CMP1_OUT/HALL_IN1/MCPWM_CH2N/UART1_TX(RX)/TIM1_CH1/ADC_TRIG0/CMP1_IP2/P2.5: multifunction GPIO with a software-enabled 10k pull-up. |
| 46 | P2.6 | bidirectional | PULL_UP/HALL_IN2/MCPWM_CH3P/TIM3_CH0/ADC_TRIG1/CMP1_IP3/P2.6: multifunction GPIO with a software-enabled 10k pull-up. |
| 47 | P2.13/SWCLK | bidirectional | PULL_UP/SWCLK/MCPWM_CH3N/UART0_TX(RX)/SCL/TIM3_CH1/P2.13: SWD clock by default with a fixed internal 10k pull-up, can be multiplexed as GPIO. |
| 48 | P2.0/SWDIO | bidirectional | PULL_UP/SWDIO/UART0_TX(RX)/SDA/TIM2_CH1/P2.0: SWD data by default with a fixed internal 10k pull-up, can be multiplexed as GPIO. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LINKOSEMI |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
LKS32MC051C6T8 - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
lks32mc051c6t8-etched.step/lks32mc051c6t8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lks32mc051c6t8.step/lks32mc051c6t8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LINKOSEMI datasheet (43 pp, sha256
3df93253e82ab4d3, retrieved 2026-10-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).