LKS32MC035DL6S8

{
  "slug": "lks32mc035dl6s8",
  "version": "0.1.0",
  "type": "component",
  "description": "LINKOSEMI Microcontroller Units (MCUs/MPUs/SOCs), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "lks32mc035dl6s8",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lks32mc035dl6s8.kicad_sym",
    "lks32mc035dl6s8.kicad_mod",
    "lks32mc035dl6s8.glb",
    "lks32mc035dl6s8.step",
    "lks32mc035dl6s8.lbr",
    "docs/hero.png",
    "docs/lks32mc035dl6s8-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lks32mc035dl6s8-hero.glb",
    "lks32mc035dl6s8-hero.overlay.json",
    "lks32mc035dl6s8-etched.glb"
  ],
  "component": {
    "mpn": "LKS32MC035DL6S8",
    "manufacturer": "LINKOSEMI",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/bdfc4e61d76913174285385a859d8043.pdf",
    "parts": {
      "symbol": "lks32mc035dl6s8.kicad_sym",
      "footprint": "lks32mc035dl6s8.kicad_mod",
      "model_3d": "lks32mc035dl6s8-hero.glb",
      "model_3d_plain": "lks32mc035dl6s8-etched.glb",
      "model_3d_step": "lks32mc035dl6s8-etched.step",
      "model_3d_step_plain": "lks32mc035dl6s8.step",
      "lbr": "lks32mc035dl6s8.lbr"
    },
    "distributor_links": {
      "lcsc": "C5209381"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T00:35:02Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVDD",
        "type": "power_in",
        "description": "Supplies the MCU at 2.5-5.5V per the recommended operating conditions and carries the 5V LDO output, with a recommended 1uF decoupling capacitor placed close to the pin."
      },
      {
        "number": "2",
        "name": "P0_8",
        "type": "bidirectional",
        "description": "GPIO P0.8 with CMP0_OUT, MCPWM_BKIN1, UART0_TXD, SPI_CLK, SCL, TIM0_CH0, ADC_TRIGGER, ADC_CH4 and CMP0_IP3 alternate functions, with a built-in 10kΩ pull-up that can be turned off by software."
      },
      {
        "number": "3",
        "name": "P0_7 / P0_9",
        "type": "bidirectional",
        "description": "Shared pin labeled P0_7 (UART0_TXD, SCL, TIM0_CH1, ADC_CH5, OPAx_OUT, EXTI5) and P0_9 (CLKO, MCPWM_CH0P, UART0_RXD, SPI_DO, SDA, ADC_CH6, CMP0_IN, EXTI7, WK3), each with a built-in 10kΩ pull-up that can be turned off by software."
      },
      {
        "number": "4",
        "name": "VCC",
        "type": "power_in",
        "description": "Gate driver supply input rated 7.5-28V for the 035D; when VCC is above 20V, AVDD is powered from the LDO5V output, and a decoupling capacitor of at least 1uF is required between VCC and ground."
      },
      {
        "number": "5",
        "name": "HO1",
        "type": "output",
        "description": "Phase A high-side gate drive output, driven by MCU P0.13 with the same polarity as P0.13 (HO1 = 1 when P0.13 = 1), which requires MCPWM_SWAP = 1."
      },
      {
        "number": "6",
        "name": "LO1",
        "type": "output",
        "description": "Phase A low-side gate drive output, driven by MCU P0.10 with the same polarity as P0.10 (LO1 = 1 when P0.10 = 1), which requires MCPWM_SWAP = 1."
      },
      {
        "number": "7",
        "name": "HO2",
        "type": "output",
        "description": "Phase B high-side gate drive output, driven by MCU P0.14 per the 035D pin figure and schematic, with polarity and MCPWM_SWAP requirement not stated in the 035D table extract."
      },
      {
        "number": "8",
        "name": "LO2",
        "type": "output",
        "description": "Phase B low-side gate drive output, driven by MCU P0.11 per the 035D pin figure and schematic, with polarity and MCPWM_SWAP requirement not stated in the 035D table extract."
      },
      {
        "number": "9",
        "name": "HO3",
        "type": "output",
        "description": "Phase C high-side gate drive output, driven by MCU P0.15 per the 035D pin figure and schematic, with polarity and MCPWM_SWAP requirement not stated in the 035D table extract."
      },
      {
        "number": "10",
        "name": "LO3",
        "type": "output",
        "description": "Phase C low-side gate drive output, driven by MCU P0.12 per the 035D pin figure and schematic, with polarity and MCPWM_SWAP requirement not stated in the 035D table extract."
      },
      {
        "number": "11",
        "name": "P1_5",
        "type": "bidirectional",
        "description": "GPIO P1.5 with SPI_DI, SCL, TIM1_CH1, ADC_CH8, OPA1_IN and CMP1_IP0 alternate functions, with a built-in 10kΩ pull-up that can be turned off by software."
      },
      {
        "number": "12",
        "name": "P1_3 / P1_4 / P1_7",
        "type": "bidirectional",
        "description": "Shared pin labeled P1_3 (SPI_CS, TIM1_CH0, OPA1_IP), P1_4 (CMP1_OUT, MCPWM_BKIN0, SPI_CS, TIM0_CH1, CMP1_IN, PU) and P1_7 (CMP0_OUT, HALL_IN0, MCPWM_CH2P, UART0_RXD, TIM0_CH0, ADC_TRIGGER, CMP1_IP1, PU)."
      },
      {
        "number": "13",
        "name": "P1_8",
        "type": "bidirectional",
        "description": "GPIO P1.8 with SWCLK, HALL_IN2, MCPWM_CH3P, UART0_TXD, SCL, TIM1_CH0, ADC_TRIGGER and CMP1_IP3 alternate functions, with a built-in 10kΩ pull-up that can be turned off by software."
      },
      {
        "number": "14",
        "name": "P1_9",
        "type": "bidirectional",
        "description": "GPIO P1.9 with SWDAT, MCPWM_CH3N, UART0_RXD, SDA, TIM1_CH1 and ADC_CH9 alternate functions, with a built-in 10kΩ pull-up that can be turned off by software."
      },
      {
        "number": "15",
        "name": "P0_0 / P0_2 / P0_3",
        "type": "bidirectional",
        "description": "Shared pin labeled P0_0 (MCPWM_BKIN0, UART0_RXD, ADC_CH10, REF, LDO15, DAC_OUT), P0_2 (SPI_DI, RST_n, used as RSTN by default with a 10nF-100nF capacitor to ground) and P0_3 (TIM1_CH0, OPA0_IN_B)."
      },
      {
        "number": "16",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin, which should be grounded uniformly with the other ground pins on the PCB."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 3 is printed with two port labels (P0_7 and P0_9) in the 035D table, and pins 12 and 15 are also; The extracted text is missing page 21, which holds the Table 3-3 descriptions for pins 7 through 12 ; Pin 1 is described in Table 3-3 as a 5V LDO output, while the recommended-operating-conditions table"
        ],
        "pages_sent": 67,
        "cost_usd": 0.0765,
        "at": "2026-10-28T00:34:42"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/bdfc4e61d76913174285385a859d8043.pdf",
        "pages": 118,
        "sha256": "1c32edb1f3151627",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lks32mc035dl6s8.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lks32mc035dl6s8-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e0c11a3c98f1d7b8a1013bd1b957b7310126fb40ad7c69752553b3877ac75974",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}