component
LKQ4919ST
Public Made by Adomby adom
LKWIC Supervisor And Reset ICs, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLKQ4919ST
LKWIC · Supervisor And Reset ICs · SOT-23-6
LKQ4919ST from LKWIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET# | output | Open-drain reset output that is driven low when SENSE falls below VIT or MR# is at logic low, and needs a 10kΩ to 1MΩ pull-up to VDD (it may be pulled above VDD). |
| 2 | GND | power_in | Ground reference pin. |
| 3 | MR# | input | Manual reset input; driving it low asserts RESET#, and it has an internal 100kΩ pull-up to VDD. |
| 4 | CT | passive | Reset timeout delay pin: connecting it to VDD through a 40kΩ to 200kΩ resistor or leaving it open gives a fixed delay, while a grounded capacitor of at least 100pF sets a user-programmable delay. |
| 5 | SENSE | input | Voltage monitor input; RESET# is asserted when the voltage on this pin falls below the threshold VIT. |
| 6 | VDD | power_in | Power supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LKWIC |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage (absolute maximum) | VDD | -0.3 | 7 | V | 5 | ||
| CT pin voltage (absolute maximum) | VCT | -0.3 | V | 5 | |||
| RESET# pin voltage (absolute maximum) | VRESET# | -0.3 | 7 | V | 5 | ||
| MR# pin voltage (absolute maximum) | VMR# | -0.3 | 7 | V | 5 | ||
| SENSE pin voltage (absolute maximum) | VSENSE | -0.3 | 7 | V | 5 | ||
| RESET# pin current (absolute maximum) | IRESET# | -5 | 5 | mA | 5 | ||
| Storage temperature | TSTG | -65 | 150 | ℃ | 5 | ||
| Junction temperature | Tj | 150 | ℃ | 5 | |||
| Power supply voltage (recommended) | VDD | 1.7 | 6.5 | V | 5 | ||
| SENSE pin voltage (recommended) | VSENSE | 0 | 6.5 | V | 5 | ||
| MR# pin voltage (recommended) | VMR# | 0 | 6.5 | V | 5 | ||
| RESET# pin voltage (recommended) | VRESET# | 0 | 6.5 | V | 5 | ||
| RESET# pin current (recommended) | IRESET# | 0.0003 | 5 | mA | 5 | ||
| Operating temperature | TA | -40 | 85 | ºC | 5 | ||
| Supply voltage | VDD | 1.7 | 6.5 | V | 6 | ||
| Supply voltage | VDD | 1.65 | 6.5 | V | TA=0℃～+85℃ | 6 | |
| Supply current (RESET# disabled, MR#, RESET#, CT open) | IDD | 0.8 | 1.6 | µA | VDD=3.3V | 6 | |
| Supply current (RESET# disabled, MR#, RESET#, CT open) | IDD | 1 | 2 | µA | VDD=6.5V | 6 | |
| Output low voltage | VOL | 0.2 | V | 1.3V≤VDD<1.8V, IOL=0.4mA | 6 | ||
| Output low voltage | VOL | 0.3 | V | 1.8V≤VDD<6.5V, IOL=1.0mA | 6 | ||
| Power-on reset voltage | VPOR | 0.8 | V | VOL(Max)=0.2V, IRESET#=15µA | 6 | ||
| Reverse input threshold voltage accuracy | -2 | 2 | % | 6 | |||
| Reverse input threshold voltage accuracy | -1.5 | 1.5 | % | VIT≤3.3V, TA=-40℃～+85℃ | 6 | ||
| VIT hysteresis voltage | VHYST | 1.5 | 3 | % VIT | 6 | ||
| MR# internal pull-up resistance | RMR# | 50 | 100 | kΩ | 6 | ||
| SENSE input current | ISENSE | -1 | 1 | µA | VSENSE=VIT | 6 | |
| RESET# delay time | td | 12 | 20 | 28 | ms | CT=Open | 6 |
| RESET# delay time | td | 180 | 300 | 420 | ms | CT=VDD | 6 |
| RESET# delay time | td | 0.75 | 1.25 | 1.75 | ms | CT=100pF | 6 |
| RESET# delay time | td | 700 | 1200 | 1700 | ms | CT=180nF | 6 |
| MR# input low voltage | VIL | 0 | V | 6 | |||
| VIT reverse input threshold voltage | VIT | 0.405 | V | 6 | |||
| RESET# leakage current | IOH | 300 | nA | VRESET#=6.5V, RESET# not enabled | 6 | ||
| Input capacitance (CT pin) | CIN | 5 | pF | VIN=0V~VDD | 6 | ||
| Input capacitance (other pins) | CIN | 5 | pF | VIN=0V~6.5V | 6 | ||
| Reset input pulse width (SENSE) | tw | 100 | μs | VIH=1.05VIT, VIL=0.95VIT | 6 | ||
| Reset input pulse width (MR#) | tw | 150 | ns | VIH=0.7VDD, VIL=0.3VDD | 6 | ||
| Propagation delay MR# to RESET# (high to low) | tPHL | 250 | ns | VIH=0.7VDD, VIL=0.3VDD | 6 | ||
| Propagation delay SENSE to RESET# (high to low) | tPHL | 100 | μs | VIH=1.05VIT, VIL=0.95VIT | 6 | ||
| Junction-to-ambient thermal resistance (6 pin) | RθJA | 180.9 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 117.8 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 27.8 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 18.9 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 30 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
LKQ4919ST - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
lkq4919st-etched.step/lkq4919st-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lkq4919st.step/lkq4919st.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LKWIC datasheet (11 pp, sha256
f6629aec41038312, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).