component
LKI8011SS
Public Made by Adomby adom
LKWIC LVDS ICs, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+170−8@@ -1,13 +1,180 @@ {+ "schema_version": 1,+ "type": "component", "slug": "lki8011ss",+ "title": "LKI8011SS",+ "brief": "LKWIC LVDS ICs, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "LKWIC LVDS ICs, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "lki8011ss" ],+ "component": {+ "mpn": "LKI8011SS",+ "manufacturer": "LKWIC",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Interface",+ "subcategory": "LVDS ICs",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/4a3bb9eb513d4b1a8fb28d122ccb295e.pdf",+ "parts": {+ "symbol": "lki8011ss.kicad_sym",+ "footprint": "lki8011ss.kicad_mod",+ "model_3d": "lki8011ss.glb",+ "model_3d_step": "lki8011ss.step",+ "lbr": "lki8011ss.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "IN1-",+ "type": "input",+ "description": "Channel 1 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN1+/IN1-."+ },+ {+ "number": "2",+ "name": "IN1+",+ "type": "input",+ "description": "Channel 1 LVDS non-inverting differential input. Paired with IN1- across the internal 107 \u03a9 termination."+ },+ {+ "number": "3",+ "name": "IN2+",+ "type": "input",+ "description": "Channel 2 LVDS non-inverting differential input. Paired with IN2- across the internal 107 \u03a9 termination."+ },+ {+ "number": "4",+ "name": "IN2-",+ "type": "input",+ "description": "Channel 2 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN2+/IN2-."+ },+ {+ "number": "5",+ "name": "IN3-",+ "type": "input",+ "description": "Channel 3 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN3+/IN3-."+ },+ {+ "number": "6",+ "name": "IN3+",+ "type": "input",+ "description": "Channel 3 LVDS non-inverting differential input. Paired with IN3- across the internal 107 \u03a9 termination."+ },+ {+ "number": "7",+ "name": "IN4+",+ "type": "input",+ "description": "Channel 4 LVDS non-inverting differential input. Paired with IN4- across the internal 107 \u03a9 termination."+ },+ {+ "number": "8",+ "name": "IN4-",+ "type": "input",+ "description": "Channel 4 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN4+/IN4-."+ },+ {+ "number": "9",+ "name": "EN#",+ "type": "input",+ "description": "Active-low enable input. Outputs are only driven when EN# = L (or open) AND EN = H; any other enable combination forces all four OUTx into the high-impedance state. VIH \u2265 2.0 V, VIL \u2264 0.8 V."+ },+ {+ "number": "10",+ "name": "OUT4",+ "type": "output",+ "description": "Channel 4 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ },+ {+ "number": "11",+ "name": "OUT3",+ "type": "output",+ "description": "Channel 3 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return for the device. Connect to the board 0 V plane."+ },+ {+ "number": "13",+ "name": "VCC",+ "type": "power_in",+ "description": "3.3 V supply input (recommended 3.0 V to 3.6 V, absolute max 4.0 V). Bypass with a 10 \u00b5F bulk cap and a 0.01 \u00b5F ceramic placed as close to the pin as possible; typical ICC \u2248 9 mA (20 mA max)."+ },+ {+ "number": "14",+ "name": "OUT2",+ "type": "output",+ "description": "Channel 2 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ },+ {+ "number": "15",+ "name": "OUT1",+ "type": "output",+ "description": "Channel 1 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ },+ {+ "number": "16",+ "name": "EN",+ "type": "input",+ "description": "Active-high enable input. Outputs are only driven when EN = H AND EN# = L (or open); any other enable combination forces all four OUTx into the high-impedance state. VIH \u2265 2.0 V, VIL \u2264 0.8 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/4a3bb9eb513d4b1a8fb28d122ccb295e.pdf",+ "pages": 10,+ "sha256": "ebd3114250a12870",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "LKWIC",+ "Package": "TSSOP-16",+ "Category": "Interface",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "LKI8011SS",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "lki8011ss"+ ],+ "discovery_pitch": "LKI8011SS (LKWIC) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +192,5 @@ "docs/lki8011ss-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }