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Contents

README

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LKI8011SS

LKWIC · LVDS ICs · TSSOP-16

LKI8011SS from LKWIC, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1- input Channel 1 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN1+/IN1-.
2 IN1+ input Channel 1 LVDS non-inverting differential input. Paired with IN1- across the internal 107 Ω termination.
3 IN2+ input Channel 2 LVDS non-inverting differential input. Paired with IN2- across the internal 107 Ω termination.
4 IN2- input Channel 2 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN2+/IN2-.
5 IN3- input Channel 3 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN3+/IN3-.
6 IN3+ input Channel 3 LVDS non-inverting differential input. Paired with IN3- across the internal 107 Ω termination.
7 IN4+ input Channel 4 LVDS non-inverting differential input. Paired with IN4- across the internal 107 Ω termination.
8 IN4- input Channel 4 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN4+/IN4-.
9 EN# input Active-low enable input. Outputs are only driven when EN# = L (or open) AND EN = H; any other enable combination forces all four OUTx into the high-impedance state. VIH ≥ 2.0 V, VIL ≤ 0.8 V.
10 OUT4 output Channel 4 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input
11 OUT3 output Channel 3 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input
12 GND power_in Ground return for the device. Connect to the board 0 V plane.
13 VCC power_in 3.3 V supply input (recommended 3.0 V to 3.6 V, absolute max 4.0 V). Bypass with a 10 µF bulk cap and a 0.01 µF ceramic placed as close to the pin as possible; typical ICC ≈ 9 mA (20 mA max).
14 OUT2 output Channel 2 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input
15 OUT1 output Channel 1 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input
16 EN input Active-high enable input. Outputs are only driven when EN = H AND EN# = L (or open); any other enable combination forces all four OUTx into the high-impedance state. VIH ≥ 2.0 V, VIL ≤ 0.8 V.

Key specifications

Parameter Value
Manufacturer LKWIC
Package TSSOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • LKI8011SS

CAD (KiCad official)

  • Symbol: LKI8011SS
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: lki8011ss-etched.step / lki8011ss-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lki8011ss.step / lki8011ss.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LKWIC datasheet (10 pp, sha256 ebd3114250a12870, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF