component
LKI8011SS
Public Made by Adomby adom
LKWIC LVDS ICs, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+19−16@@ -32,67 +32,67 @@ "number": "1", "name": "IN1-", "type": "input",- "description": "Channel 1 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN1+/IN1-."+ "description": "Channel 1 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN1+/IN1-." }, { "number": "2", "name": "IN1+", "type": "input",- "description": "Channel 1 LVDS non-inverting differential input. Paired with IN1- across the internal 107 \u03a9 termination."+ "description": "Channel 1 LVDS non-inverting differential input. Paired with IN1- across the internal 107 Ω termination." }, { "number": "3", "name": "IN2+", "type": "input",- "description": "Channel 2 LVDS non-inverting differential input. Paired with IN2- across the internal 107 \u03a9 termination."+ "description": "Channel 2 LVDS non-inverting differential input. Paired with IN2- across the internal 107 Ω termination." }, { "number": "4", "name": "IN2-", "type": "input",- "description": "Channel 2 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN2+/IN2-."+ "description": "Channel 2 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN2+/IN2-." }, { "number": "5", "name": "IN3-", "type": "input",- "description": "Channel 3 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN3+/IN3-."+ "description": "Channel 3 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN3+/IN3-." }, { "number": "6", "name": "IN3+", "type": "input",- "description": "Channel 3 LVDS non-inverting differential input. Paired with IN3- across the internal 107 \u03a9 termination."+ "description": "Channel 3 LVDS non-inverting differential input. Paired with IN3- across the internal 107 Ω termination." }, { "number": "7", "name": "IN4+", "type": "input",- "description": "Channel 4 LVDS non-inverting differential input. Paired with IN4- across the internal 107 \u03a9 termination."+ "description": "Channel 4 LVDS non-inverting differential input. Paired with IN4- across the internal 107 Ω termination." }, { "number": "8", "name": "IN4-", "type": "input",- "description": "Channel 4 LVDS inverting differential input. Internally terminated with the on-die ~107 \u03a9 resistor across IN4+/IN4-."+ "description": "Channel 4 LVDS inverting differential input. Internally terminated with the on-die ~107 Ω resistor across IN4+/IN4-." }, { "number": "9", "name": "EN#", "type": "input",- "description": "Active-low enable input. Outputs are only driven when EN# = L (or open) AND EN = H; any other enable combination forces all four OUTx into the high-impedance state. VIH \u2265 2.0 V, VIL \u2264 0.8 V."+ "description": "Active-low enable input. Outputs are only driven when EN# = L (or open) AND EN = H; any other enable combination forces all four OUTx into the high-impedance state. VIH ≥ 2.0 V, VIL ≤ 0.8 V." }, { "number": "10", "name": "OUT4", "type": "output",- "description": "Channel 4 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ "description": "Channel 4 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input |VID| ≥ 100 mV." }, { "number": "11", "name": "OUT3", "type": "output",- "description": "Channel 3 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ "description": "Channel 3 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input |VID| ≥ 100 mV." }, { "number": "12",@@ -104,25 +104,25 @@ "number": "13", "name": "VCC", "type": "power_in",- "description": "3.3 V supply input (recommended 3.0 V to 3.6 V, absolute max 4.0 V). Bypass with a 10 \u00b5F bulk cap and a 0.01 \u00b5F ceramic placed as close to the pin as possible; typical ICC \u2248 9 mA (20 mA max)."+ "description": "3.3 V supply input (recommended 3.0 V to 3.6 V, absolute max 4.0 V). Bypass with a 10 µF bulk cap and a 0.01 µF ceramic placed as close to the pin as possible; typical ICC ≈ 9 mA (20 mA max)." }, { "number": "14", "name": "OUT2", "type": "output",- "description": "Channel 2 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ "description": "Channel 2 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input |VID| ≥ 100 mV." }, { "number": "15", "name": "OUT1", "type": "output",- "description": "Channel 1 LVTTL/LVCMOS single-ended receiver output. Drives VOH \u2265 2.7 V at IOH = -4 mA and VOL \u2264 0.5 V at IOL = 4 mA when the corresponding differential input |VID| \u2265 100 mV."+ "description": "Channel 1 LVTTL/LVCMOS single-ended receiver output. Drives VOH ≥ 2.7 V at IOH = -4 mA and VOL ≤ 0.5 V at IOL = 4 mA when the corresponding differential input |VID| ≥ 100 mV." }, { "number": "16", "name": "EN", "type": "input",- "description": "Active-high enable input. Outputs are only driven when EN = H AND EN# = L (or open); any other enable combination forces all four OUTx into the high-impedance state. VIH \u2265 2.0 V, VIL \u2264 0.8 V."+ "description": "Active-high enable input. Outputs are only driven when EN = H AND EN# = L (or open); any other enable combination forces all four OUTx into the high-impedance state. VIH ≥ 2.0 V, VIL ≤ 0.8 V." } ], "provenance": {@@ -192,5 +192,8 @@ "docs/lki8011ss-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }