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Contents

Pinout
Key specifications
Ordering variants
CAD (KiCad official)
Provenance

README

markdown

LKI8010SS

LKWIC · LVDS ICs · TSSOP-16

LKI8010SS from LKWIC, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN1-	input	Channel 1 LVDS inverting differential input. Pair with IN1+ across a 100 Ohm external termination resistor.
2	IN1+	input	Channel 1 LVDS non-inverting differential input. Pair with IN1- across a 100 Ohm external termination resistor.
3	IN2+	input	Channel 2 LVDS non-inverting differential input. Pair with IN2- across a 100 Ohm external termination resistor.
4	IN2-	input	Channel 2 LVDS inverting differential input. Pair with IN2+ across a 100 Ohm external termination resistor.
5	IN3-	input	Channel 3 LVDS inverting differential input. Pair with IN3+ across a 100 Ohm external termination resistor.
6	IN3+	input	Channel 3 LVDS non-inverting differential input. Pair with IN3- across a 100 Ohm external termination resistor.
7	IN4+	input	Channel 4 LVDS non-inverting differential input. Pair with IN4- across a 100 Ohm external termination resistor.
8	IN4-	input	Channel 4 LVDS inverting differential input. Pair with IN4+ across a 100 Ohm external termination resistor.
9	EN#	input	Active-low output enable. When EN#=L and EN=H, all four receiver outputs are enabled. Any other combination places outputs in high-Z. VIL <= 0.8 V, VIH >= 2.0 V.
10	OUT4	output	Channel 4 LVTTL/LVCMOS receiver output. VOH >= 2.7 V at IOH=-0.4 mA; VOL <= 0.25 V at IOL=2.0 mA. High-Z when disabled.
11	OUT3	output	Channel 3 LVTTL/LVCMOS receiver output. VOH >= 2.7 V at IOH=-0.4 mA; VOL <= 0.25 V at IOL=2.0 mA. High-Z when disabled.
12	GND	power_in	Ground / 0 V reference for the device.
13	VCC	power_in	Positive supply, 3.0 V to 3.6 V (3.3 V nominal). Bypass with 10 uF and 0.01 uF capacitors in parallel, small cap close to the pin. Typical ICC = 9 mA enabled, 0.07 mA disabled.
14	OUT2	output	Channel 2 LVTTL/LVCMOS receiver output. VOH >= 2.7 V at IOH=-0.4 mA; VOL <= 0.25 V at IOL=2.0 mA. High-Z when disabled.
15	OUT1	output	Channel 1 LVTTL/LVCMOS receiver output. VOH >= 2.7 V at IOH=-0.4 mA; VOL <= 0.25 V at IOL=2.0 mA. High-Z when disabled.
16	EN	input	Active-high output enable. When EN=H and EN#=L (or open), all four receiver outputs are enabled. Any other combination places outputs in high-Z. VIL <= 0.8 V, VIH >= 2.0 V.

Key specifications

Parameter	Value
Manufacturer	LKWIC
Package	TSSOP-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

LKI8010SS

CAD (KiCad official)

Symbol: LKI8010SS
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: lki8010ss-etched.step / lki8010ss-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lki8010ss.step / lki8010ss.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: LKWIC datasheet (10 pp, sha256 54a9693139c47214, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF