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Contents

README

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LK112SM50TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LK112SM50TR from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SHDN input Shutdown input disables the regulator when it is connected to GND or to a positive voltage lower than 0.6 V.
2 GND power_in Ground pin, internally connected to the die attach flag to decrease the total thermal resistance and increase the package ability to dissipate power.
3 Bypass passive Bypass pin for a 0.1 µF capacitor to improve the thermal noise performance.
4 OUT power_out Regulated output port; for this MPN the output voltage is 5.0 V (Table 1), and output current is up to 200 mA.
5 IN power_in Input port; the operative input voltage is VOUT + 0.5 V to 14 V (for VOUT > 2 V).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: LK112SM50TR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lk112sm50tr-etched.step / lk112sm50tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lk112sm50tr.step / lk112sm50tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (17 pp, sha256 b450e613a8c75148, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF