component

LK112M50TR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 29d ago
viewers lk112m50tr: viewers · Ray 29d ago
lk112m50tr-etched.glb lk112m50tr: factory component page (tier=lcsc) · Ray 29d ago
lk112m50tr-etched.step lk112m50tr: factory component page (tier=lcsc) · Ray 29d ago
lk112m50tr-hero.glb lk112m50tr: hero GLB from the etched model (keeps the MPN mark) · Ray 29d ago
lk112m50tr-hero.overlay.json Publish 0.1.0 · Ray 29d ago
lk112m50tr.glb Publish 0.1.0 · Ray 29d ago
lk112m50tr.kicad_mod Publish 0.1.0 · Ray 29d ago
lk112m50tr.kicad_sym Publish 0.1.0 · Ray 29d ago
lk112m50tr.lbr Publish 0.1.0 · Ray 29d ago
lk112m50tr.step Publish 0.1.0 · Ray 29d ago
package.json Publish 0.1.0 · Ray 29d ago
page.json lk112m50tr: specified limits as data (metadata.characteristics, 22 rows from the datasheet) · Ray 25d ago
README.md lk112m50tr: specified limits as data (metadata.characteristics, 22 rows from the datasheet) · Ray 25d ago

LK112M50TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L

LK112M50TR from STMicroelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SHDN input Shutdown input disables the regulator when it is connected to GND or to a positive voltage less than 0.6 V.
2 GND power_in Ground pin, internally connected to the die attach flag to decrease the total thermal resistance and increase the package's ability to dissipate power.
3 Bypass passive Bypass pin; a 0.1 µF capacitor on this pin improves the noise performance.
4 OUT power_out Output port; the regulated output voltage depends on the order code and ranges from 1.5 V to 8.0 V per Table 1.
5 IN power_in Input port; operative input voltage is VOUT + 0.5 V to 14 V (for VOUT > 2 V) or 2.5 V to 14 V (for VOUT < 2 V), with an absolute maximum DC input voltage of 16 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-23-5L
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage tolerance VO -2 2 % IO = 30mA 6
Quiescent current, on mode Iq 175 250 µA On mode (except ISHDN) 6
Quiescent current, off mode Iq 0 0.1 µA Off mode, VI = 8V, VSHDN = 0V 6
Line regulation ΔVO 0.7 20 mV VI = VO+1V to VO+6V, VO ≤ 5.6V 6
Load regulation ΔVO 15 30 mV IO = 1 to 60mA 6
Load regulation ΔVO 25 90 mV IO = 1 to 150mA 6
Dropout voltage Vd 0.17 0.24 V IO = 60mA (1) 6
Dropout voltage Vd 0.29 0.35 V IO = 150mA (1) 6
Shutdown input current ISHDN 12 35 µA VSHDN = 1.8V, output on 6
Shutdown input logic, output on VSHDN 1.8 V Output on 6
Shutdown input logic, output off VSHDN 0.6 V Output off 6
Output current limit IO 150 mA 6
Supply voltage rejection SVR 55 dB VI = VO+1.5V, CBYP = 0.1µF; CO = 10µF, f = 400Hz, IO = 30mA 6
Output noise voltage eN 30 µVrms B = 10Hz to 80kHz, CBYP = 0.1µF; CO = 10µF, VI = VO+1.5V, IO = 60mA 6
Output voltage temperature coefficient ΔVO/TJ 0.09 mV/°C IO = 10mA 6
DC input voltage VI 16 V 5
DC input voltage (shutdown pin) VSHDN 16 V 5
Storage temperature range TSTG -55 150 °C 5
Operating junction temperature range TOP -40 125 °C 5
Operative input voltage VI 14 V For VOUT > 2 V; minimum is VOUT + 0.5 V 1
Thermal resistance junction-case RthJC 81 °C/W SOT23-5L 5
Thermal resistance junction-ambient RthJA 255 °C/W SOT23-5L 5

CAD (KiCad official)

  • Symbol: LK112M50TR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5L (KiCad packages3D, STEP)
  • 3D model files: lk112m50tr-etched.step / lk112m50tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lk112m50tr.step / lk112m50tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (18 pp, sha256 fc1c9dfacf62927c, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF