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docs lhr3020bfaa: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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lhr3020bfaa-etched.fit.json lhr3020bfaa: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lhr3020bfaa-etched.glb lhr3020bfaa: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lhr3020bfaa-etched.step lhr3020bfaa: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lhr3020bfaa.glb Publish 0.1.0 · Ray 1mo ago
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page.json lhr3020bfaa: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md lhr3020bfaa: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

LHR3020BFAA

Legendsemi · Voltage Reference · SOP-8

LHR3020BFAA from Legendsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DNC unconnected Do Not Connect. Reserved/internal test pin; must be left electrically floating on the PCB. Do not tie to GND, VIN, or any signal.
2 VIN power_in Positive supply input. Operating range VOUT+0.2V to 18V (LHR3020: VIN min = VOUT+0.2V; other variants ≥2.7V). Absolute maximum -0.2V to 18V. Bypass with 1 µF to 10 µF placed close to the pin.
3 TEMP output Temperature-monitor analog output. High-impedance node following VTEMP = 668 mV + 1.91 mV/°C × T; accuracy ≈ ±15°C. Buffer with a low-drift op-amp when driving low-impedance loads to avoid measurement error; loading this pin does not affect VOUT accuracy.
4 GND power_in Device ground / 0 V reference return for VIN, VOUT, and TEMP.
5 NC unconnected No Internal Connection. Pin is not bonded internally; may be left floating or tied to a plane at the designer's discretion.
6 VOUT power_out Precision reference voltage output. Nominal 2.048 V for LHR3020, initial accuracy ±0.1% (B-grade), drift 8 ppm/°C max. Sinks/sources up to ±10 mA. Must be decoupled to GND with a 1 µF to 50 µF output capacitor.
7 DNC unconnected Do Not Connect. Reserved/internal test pin; must be left electrically floating on the PCB.
8 DNC unconnected Do Not Connect. Reserved/internal test pin; must be left electrically floating on the PCB.

Key specifications

Parameter Value
Manufacturer Legendsemi
Package SOP-8
Category Power Management (PMIC)
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • LHR3020BFAA
  • LHR3020BFAAAFAA
  • LHR3020BFAABFMA
  • LHR3020BFAAAFMA

CAD (KiCad official)

  • Symbol: LHR3020BFAA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: lhr3020bfaa-etched.step / lhr3020bfaa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lhr3020bfaa.step / lhr3020bfaa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Legendsemi datasheet (None pp, sha256 a5ef983cd4f79fdb, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF