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LGSOT12CLT1G

LRC · ESD And Surge Protection (TVS/ESD) · SOT-23

LGSOT12CLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1 passive One of the two unidirectional Transil terminals; it clamps positive transients just above the logic supply level and negative transients to a diode drop below ground, and pins 1 and 2 can be connected together for bidirectional use.
2 2 passive The second unidirectional Transil terminal, with the same clamping behaviour as pin 1 for ESD protection of data and transmission lines (IEC61000-4-2 15 kV air, 8 kV contact).
3 3 passive Common terminal of the dual suppressor array shown on the SOT-23 pin drawing; the datasheet does not explicitly name its function, though the application note describes the array as connected between the signal line and ground.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Circuit Protection
Pins 3

CAD (KiCad official)

  • Symbol: LGSOT12CLT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lgsot12clt1g-etched.step / lgsot12clt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lgsot12clt1g.step / lgsot12clt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 f5dbe054ac4a6ffa, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF