component
LGS63030EP
Public Made by Adomby adom
Legend Si LED Drivers, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -37,6 +37,20 @@ LGS63030EP from Legend Si, in a ESOP-8. Pinout and pin descriptions extracted fr - Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm` - 3D model: ESOP-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`lgs63030ep.step`](lgs63030ep.step) | 193 KB | You want the bare part, or you mark your own boards. |+| [`lgs63030ep-etched.step`](lgs63030ep-etched.step) | 2.2 MB | You want the part with `LGS63030EP` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 533 faces against 63 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "lgs63030ep",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Legend Si LED Drivers, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+12−9@@ -4,7 +4,7 @@ "slug": "lgs63030ep", "title": "LGS63030EP", "brief": "Legend Si LED Drivers, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,7 +34,7 @@ "number": "1", "name": "FB", "type": "input",- "description": "Feedback input. Connected to an external sense resistor R_SENSE from the LED cathode string, the output current is set by I_OUT = V_FB / R_SENSE with typical V_FB = 0.2 V (0.195-0.205 V). FB bias current \u2264 50 nA."+ "description": "Feedback input. Connected to an external sense resistor R_SENSE from the LED cathode string, the output current is set by I_OUT = V_FB / R_SENSE with typical V_FB = 0.2 V (0.195-0.205 V). FB bias current ≤ 50 nA." }, { "number": "2",@@ -46,19 +46,19 @@ "number": "3", "name": "SW", "type": "power_out",- "description": "Internal boost power switch node (drain of the 350 m\u03a9 low-side N-MOSFET). Connect the external boost inductor (typ. 4.7 \u00b5H) and Schottky freewheeling diode (e.g. PMEG6020R) at this pin. Absolute max SW-to-GND voltage: -0.3 V to +60 V; peak switch current up to 3 A. ESOP-8 exposes SW on pins 3 and 4, which must be tied together on the PCB."+ "description": "Internal boost power switch node (drain of the 350 mΩ low-side N-MOSFET). Connect the external boost inductor (typ. 4.7 µH) and Schottky freewheeling diode (e.g. PMEG6020R) at this pin. Absolute max SW-to-GND voltage: -0.3 V to +60 V; peak switch current up to 3 A. ESOP-8 exposes SW on pins 3 and 4, which must be tied together on the PCB." }, { "number": "4", "name": "SW", "type": "power_out",- "description": "Second SW pin on the ESOP-8 package - electrically identical to pin 3, providing parallel current path and heat spreading for the internal 350 m\u03a9 boost switch. Must be shorted to pin 3 on the PCB and connected to the boost inductor / Schottky diode node."+ "description": "Second SW pin on the ESOP-8 package - electrically identical to pin 3, providing parallel current path and heat spreading for the internal 350 mΩ boost switch. Must be shorted to pin 3 on the PCB and connected to the boost inductor / Schottky diode node." }, { "number": "5", "name": "VIN", "type": "power_in",- "description": "Main power input, 3.0 V to 60 V (absolute max 60 V, -0.3 V to +60 V). UVLO rising \u2248 3.0 V / falling \u2248 2.6 V. Bypass with a 4.7 \u00b5F (or larger) X5R/X7R ceramic capacitor rated \u2265 100 V, placed as close as possible to VIN and GND."+ "description": "Main power input, 3.0 V to 60 V (absolute max 60 V, -0.3 V to +60 V). UVLO rising ≈ 3.0 V / falling ≈ 2.6 V. Bypass with a 4.7 µF (or larger) X5R/X7R ceramic capacitor rated ≥ 100 V, placed as close as possible to VIN and GND." }, { "number": "6",@@ -70,13 +70,13 @@ "number": "7", "name": "OVP", "type": "input",- "description": "Output over-voltage protection sense. Connect the midpoint of a resistor divider from V_OUT to GND to this pin. OVP trips when V_OVP rises above \u2248 1 V (recovery \u2248 0.86 V); the resulting V_OUT_OVP = (1 + R1/R2) \u00d7 1 V. Absolute max -0.3 V to +6 V; keep the pin voltage below 1 V in normal operation."+ "description": "Output over-voltage protection sense. Connect the midpoint of a resistor divider from V_OUT to GND to this pin. OVP trips when V_OVP rises above ≈ 1 V (recovery ≈ 0.86 V); the resulting V_OUT_OVP = (1 + R1/R2) × 1 V. Absolute max -0.3 V to +6 V; keep the pin voltage below 1 V in normal operation." }, { "number": "8", "name": "EN", "type": "input",- "description": "Enable / dimming input. Accepts a DC level (analog dimming 0.6-1.2 V on LGS63030) or a PWM square wave (100 Hz-1 kHz on LGS63030, 100 Hz-25 kHz on LGS63032) to dim the LED output. Drive > 0.5 V (typ. 0.31 V rising / 0.35 V falling for digital thresholds) to enable the boost; drive < 0.4 V to enter low-power sleep. Internal 800 k\u03a9 pull-down; do not float. Input current \u2264 10 \u00b5A at V_EN = 5 V. Absolute max -0.3 V to +6 V."+ "description": "Enable / dimming input. Accepts a DC level (analog dimming 0.6-1.2 V on LGS63030) or a PWM square wave (100 Hz-1 kHz on LGS63030, 100 Hz-25 kHz on LGS63032) to dim the LED output. Drive > 0.5 V (typ. 0.31 V rising / 0.35 V falling for digital thresholds) to enable the boost; drive < 0.4 V to enter low-power sleep. Internal 800 kΩ pull-down; do not float. Input current ≤ 10 µA at V_EN = 5 V. Absolute max -0.3 V to +6 V." }, { "number": "9",@@ -157,6 +157,9 @@ "docs/hero.png", "docs/lgs63030ep-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"- ]+ "viewers/footprint.html",+ "pads.json"+ ],+ "description": "Legend Si LED Drivers, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "visibility": "public" }