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LGS6302EP

Public Made by Adom

by adom

Legend Si DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs Publish 0.1.0 · Ray 24d ago
viewers lgs6302ep: viewers · Ray 24d ago
lgs6302ep-etched.glb lgs6302ep: factory component page (tier=lcsc) · Ray 24d ago
lgs6302ep-etched.step lgs6302ep: factory component page (tier=lcsc) · Ray 24d ago
lgs6302ep-hero.glb lgs6302ep: hero GLB from the etched model (keeps the MPN mark) · Ray 24d ago
lgs6302ep-hero.overlay.json Publish 0.1.0 · Ray 24d ago
lgs6302ep.glb Publish 0.1.0 · Ray 24d ago
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lgs6302ep.kicad_sym Publish 0.1.0 · Ray 24d ago
lgs6302ep.lbr Publish 0.1.0 · Ray 24d ago
lgs6302ep.step Publish 0.1.0 · Ray 24d ago
package.json Publish 0.1.0 · Ray 24d ago
page.json lgs6302ep: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 17d ago
README.md lgs6302ep: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 17d ago

LGS6302EP

Legend Si · DC-DC Converters · ESOP-8

LGS6302EP from Legend Si, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB input Feedback input, connected to an external resistor divider (RF and RG) that sets the output voltage.
2 GND power_in Ground pin.
3 SW output Internal power switch node; connect the external power inductor and Schottky diode here.
4 SW output Internal power switch node (second SW pin of the ESOP8 package); connect the external power inductor and Schottky diode here.
5 VIN power_in Driver power input; place a 4.7 uF or larger ceramic bypass capacitor as close as possible between VIN and GND.
6 NC unconnected No connection; no external component required, keep this pin floating.
7 NC unconnected No connection; no external component required, keep this pin floating.
8 EN input Boost enable input: EN above 0.5 V enables the converter, EN below 0.4 V shuts it down, and the pin should not be left floating because the internal pull-down is weak.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Legend Si
Package ESOP-8
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Recommended input voltage range (VIN) VIN 3 60 V 3
Power switch on-resistance RDS(ON) RDS(ON) 330 350 410 mΩ TJ= 25℃ 3
Switching frequency fSW fSW 1.05 1.2 1.35 MHZ PWM Operation 3
Maximum duty cycle DMAX DMAX 85 90 % 3
SW current limit (peak) ILIMIT.SW(Peak) 1.5 1.7 2.1 A VIN=5V 3
FB feedback voltage VFB 1.195 1.2 1.205 V 3
EN input current IEN 5 10 μA VEN=5V 3
Absolute max voltage, pins VIN and SW to GND -0.3 60 V 2
Absolute max voltage, pins FB and EN to GND -0.3 6 V 2
Absolute max power switch current 2 A 2
Storage temperature -65 150 ℃ 2
Operating temperature -40 125 ℃ 2
ESD rating HBM -2 2 KV 2
ESD rating CDM -500 500 V 2
Undervoltage lockout rising threshold VUVLO 3 V Rising 3
Undervoltage lockout falling threshold VUVLO 2.6 V Falling 3
Quiescent operating current IQ 180 μA No load, No Switch, VIN=12V 3
Shutdown current IS 10 μA EN=0, VIN=12V 3
FB bias current IFB.BIAS 50 nA 3
SW leakage current ISW.LKG 4 μA 3
EN rising threshold VEN_H 0.5 V EN=0 EN=1 3
EN falling threshold VEN_L 0.4 V EN=1 EN=0 3
Over-temperature protection rising TOTP-R 150 ℃ TJ Rising 3
Over-temperature protection release (falling) TOTP-F 120 ℃ TJ Falling 3
Thermal resistance junction to ambient θJA 210 ℃/W 0 LFPM Air Flow 3
Thermal resistance junction to PCB board θJB 38.4 ℃/W 3
Thermal resistance junction to package top θJCtop 122 ℃/W 3
Thermal characterization junction to board ΨJB 37.5 ℃/W 3

CAD (KiCad official)

  • Symbol: LGS6302EP
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: lgs6302ep-etched.step / lgs6302ep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lgs6302ep.step / lgs6302ep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Legend Si datasheet (26 pp, sha256 d3449d0e5ebff153, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF