component
LGS5148
Public Made by Adomby adom
Legend-Si DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLGS5148
Legend-Si · DC-DC Converters · SOT-23-6
LGS5148 from Legend-Si, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | power_out | Internal power switch node that connects to the external inductor and Schottky diode, with the BST-to-SW voltage limited to -0.3 V to 6 V (VBST-SW of 5 V for the bootstrap capacitor CBST). |
| 2 | GND | power_in | Power ground pin, which the input capacitor CVIN should connect to as close as possible to the VIN and GND pins. |
| 3 | FB | input | Feedback input where the output voltage is set by an external resistor divider, with a feedback voltage of 775 mV to 825 mV (800 mV typical) and a pin-to-GND rating of -0.3 V to 6 V. |
| 4 | EN | input | Enable pin that is pulled high to enable the output and pulled low to disable it, with 2 V to 5 V recommended on EN to GND, a rated range of -0.3 V to 6 V, and a rising threshold of 1.5 V to 1.8 V. |
| 5 | VIN | power_in | Input power pin for a 8 V to 48 V input range, which requires a bypass capacitor of at least 4.7 µF to GND, with a pin-to-GND rating of -0.3 V to 60 V. |
| 6 | SW | output | Converter switch node that connects to the external power inductor, with a pin-to-GND rating of -0.3 V to 60 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Legend-Si |
| Package | SOT-23-6 |
| Category | Power Supply Chip |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Pin-to-GND voltage (VIN, SW) | -0.3 | 60 | V | 2 | |||
| BST-to-SW voltage | -0.3 | 6 | V | 2 | |||
| PIN-to-GND voltage (FB, EN) | -0.3 | 6 | V | 2 | |||
| Storage temperature | -65 | 150 | 2 | ||||
| Junction temperature | -40 | 125 | 2 | ||||
| ESD rating (HDM) | -2000 | 2000 | V | 2 | |||
| ESD rating (CDM) | -1000 | 1000 | V | 2 | |||
| VIN to GND voltage | 8 | 48 | V | 2 | |||
| EN to GND voltage | 2 | 5 | V | 2 | |||
| VOUT | VOUT | 5 | V | 2 | |||
| IOUT | IOUT | 0 | 0.6 | A | 2 | ||
| Junction temperature (recommended operating) | -40 | 125 | °C | 2 | |||
| VIN Input voltage range | VIN | 8 | 48 | V | 3 | ||
| IQ (quiescent) | IQ | 200 | µA | No Switch | 3 | ||
| ISD (shutdown) | IS | 1 | µA | EN=0 | 3 | ||
| VEN_R (rising threshold) | VEN_R | 1.5 | 1.8 | V | TJ= 25 | 3 | |
| VEN_F (falling threshold) | VEN_F | 0.6 | 1 | V | 3 | ||
| EN input leakage current | ILKG_EN | 100 | µA | 3 | |||
| High side MOSFET current limitation | ISC_HS | 1 | 1.2 | 1.4 | A | 3 | |
| zero crossing detection | IZC | 90 | mA | DCM mode, light load | 3 | ||
| Leakage current of SW | ISW | 0.8 | A | 3 | |||
| On resistance of high side MOS transistor | Rdson_HS | 450 | mΩ | 3 | |||
| On resistance of low side MOS transistor | Rdson_LS | 470 | mΩ | 3 | |||
| The first SW pulse to VOUT GD | TSS | 0.6 | ms | VIN> 4.5V | 3 | ||
| FB leakage current | IFB | 100 | 120 | nA | VIN=12V FB=0.8V | 3 | |
| feedback voltage | VFB | 775 | 800 | 825 | mV | 3 | |
| Minimum conduction time of high side MOS | TON_MIN | 100 | ns | 3 | |||
| Maximum switch duty cycle | DMAX | 93 | % | 3 | |||
| Hot shutdown | TSD | 150 | 3 | ||||
| Delay of thermal shutdown | TSD_H | 25 | 3 | ||||
| switching frequency | FSW | 900 | Khz | 3 | |||
| Thermal resistance coefficient from silicon core to surrounding air | θJA | 173 | °C/W | 0 LFPM Air Flow | 3 | ||
| Thermal resistance coefficient from silicon core to PCB board surface | θJB | 33.2 | °C/W | 3 | |||
| Thermal resistance coefficient from silicon core to packaging surface | θJCtop | 116 | °C/W | 3 | |||
| Thermal resistance coefficient from silicon core to PCB board surface (ΨJB) | ΨJB | 30 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
LGS5148 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
lgs5148-etched.step/lgs5148-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lgs5148.step/lgs5148.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Legend-Si datasheet (16 pp, sha256
8ed32618147cf902, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).