component
LGS5145EP
Public Made by Adomby adom
Legend Si DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
lgs5145ep: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
4843b78
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211
{
"schema_version": 1,
"type": "component",
"slug": "lgs5145ep",
"title": "LGS5145EP",
"brief": "Legend Si DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
"lgs5145ep"
],
"component": {
"mpn": "LGS5145EP",
"manufacturer": "Legend Si",
"package": "ESOP-8",
"pin_count": 9,
"category": "PMIC",
"subcategory": "DC-DC Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/84340b478787d0b579406c9173500383.pdf",
"parts": {
"symbol": "lgs5145ep.kicad_sym",
"footprint": "lgs5145ep.kicad_mod",
"model_3d": "lgs5145ep-etched.glb",
"model_3d_plain": "lgs5145ep.glb",
"model_3d_step": "lgs5145ep-etched.step",
"model_3d_step_plain": "lgs5145ep.step",
"lbr": "lgs5145ep.lbr"
},
"distributor_links": {
"lcsc": "C22470481"
},
"pins": [
{
"number": "1",
"name": "BST",
"type": "passive",
"description": "Bootstrap supply pin for the high-side gate driver. A high-quality 100nF ceramic capacitor must be connected between BST and SW to bias the internal high-side MOSFET gate driver. Observe capacitor voltage rating (≥16V recommended)."
},
{
"number": "2",
"name": "VIN",
"type": "power_in",
"description": "Regulator power input, 4.5V-60V. Bypass with a 2.2µF (or larger) ceramic capacitor placed as close as possible between VIN and GND to minimize ringing and EMI."
},
{
"number": "3",
"name": "EN",
"type": "input",
"description": "Regulator enable input. Drive high (>1.4V) to enable the buck output; drive low (<1.0V) to shut down the regulator and enter low-power sleep. Has an internal ~100nA weak pull-down; do not leave floating in noisy environments - tie to VIN for auto-start."
},
{
"number": "4",
"name": "NC",
"type": "unconnected",
"description": "No connect. Leave floating."
},
{
"number": "5",
"name": "FB",
"type": "input",
"description": "Feedback input to the internal error amplifier. Connect to the tap of an external resistor divider from VOUT to GND; internal reference is 0.812V. VOUT = 0.812 × (RF + RG)/RG; keep RG ≤ 30kΩ. Absolute max FB voltage is -0.3V to 6V."
},
{
"number": "6",
"name": "NC",
"type": "unconnected",
"description": "No connect. Leave floating."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground return pin. Must be connected to the exposed pad and to the system ground plane through multiple vias for proper thermal and electrical performance."
},
{
"number": "8",
"name": "SW",
"type": "output",
"description": "Internal power-switch node. Connect to the external power inductor, Schottky freewheeling diode (e.g. SS26), and the CBST bootstrap capacitor. Handles the switching waveform at 1.2MHz with peak currents up to 1.7A."
},
{
"number": "9",
"name": "GND (Exposed Pad)",
"type": "power_in",
"description": "Exposed thermal pad on the bottom of the ESOP-8 package. Must be soldered to the PCB ground plane (connected to GND, pin 7) for thermal dissipation and electrical grounding.",
"source": "renumbered-to-footprint-pad"
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/84340b478787d0b579406c9173500383.pdf",
"pages": 23,
"sha256": "b368131b194cf7e0",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e",
"mark": "drawn"
},
"models_3d": [
{
"file": "lgs5145ep.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f1718a42c5ea007e8e2dd672ac39a1bb358ee4849bd53c42e21ce83e0e5df7a9",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "lgs5145ep-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "3a132138207d2f38e04b8e2206b39a501c8c53fefd5b1192bb4c75e6c7c73c5c",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Legend Si",
"Package": "ESOP-8",
"Category": "PMIC",
"Pins": "9"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"lgs5145ep"
],
"discovery_pitch": "LGS5145EP (Legend Si) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"lgs5145ep.kicad_sym",
"lgs5145ep.kicad_mod",
"lgs5145ep.glb",
"lgs5145ep.step",
"lgs5145ep-etched.step",
"lgs5145ep.lbr",
"docs/hero.png",
"docs/lgs5145ep-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"variants": [
{
"mpn": "LGS5145EP",
"kind": "packaging"
}
],
"updated_at": "2026-09-24T23:57:15.055Z"
}