component
LF50CDT-TR
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DPAK. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLF50CDT-TR
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK
LF50CDT-TR from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated output voltage; 5.0 V nominal (±2%), up to 500 mA output current, requires 2.2 µF bypass capacitor (ESR 0.1-10 Ω) for stability. |
| 2 | GND | power_in | Ground reference; electrically connected to the exposed thermal TAB on the DPAK package. |
| 3 | VI | power_in | DC input supply voltage; operating range up to 16 V (abs. max −0.5 V to 40 V; regulator enters shutdown for VI > 18 V). |
| TAB | GND | power_in | Exposed thermal pad (heat slug); electrically connected to GND (pin 2); RθJC = 8 °C/W, RθJA = 100 °C/W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (25 °C) | VO | 4.9 | 5 | 5.1 | V | IO = 50 mA, VI = 7 V | 20 |
| Output voltage (Ta = -25 to 85 °C) | VO | 4.8 | 5.2 | V | IO = 50 mA, VI = 7 V, Ta = -25 to 85 °C | 20 | |
| Operating input voltage | VI | 16 | V | IO = 500 mA | 20 | ||
| Line regulation | ΔVO | 5 | 25 | mV | VI = 6 to 16 V, IO = 5 mA | 20 | |
| Load regulation | ΔVO | 5 | 25 | mV | VI = 6.3 V, IO = 5 to 500 mA | 20 | |
| Quiescent current, ON mode | Id | 0.5 | 1 | mA | VI = 6 to 16 V, IO = 0 mA, ON mode | 20 | |
| Quiescent current, ON mode at full load | Id | 12 | mA | VI = 6.3 to 16 V, IO = 500 mA | 20 | ||
| Quiescent current, OFF mode | Id | 50 | 100 | µA | VI = 6 V, OFF mode | 20 | |
| Dropout voltage | Vd | 0.2 | 0.35 | V | IO = 200 mA | 20 | |
| Dropout voltage | Vd | 0.4 | 0.7 | V | IO = 500 mA | 20 | |
| Control input logic low | VIL | 0.8 | V | Ta = -40 to 125 °C | 20 | ||
| Control input logic high | VIH | 2 | V | Ta = -40 to 125 °C | 20 | ||
| Output bypass capacitance | CO | 2 | 10 | µF | ESR = 0.1 to 10 Ω, IO = 0 to 500 mA | 20 | |
| Absolute maximum DC input voltage | VI | -0.5 | 40 | V | Note 1: for 18 V < VI < 40 V the regulator is in shutdown | 5 | |
| Storage temperature range | TSTG | -40 | 150 | °C | 5 | ||
| Operating junction temperature range | TOP | -40 | 125 | °C | 5 | ||
| Output current limit | IO | 1 | A | 20 | |||
| Supply voltage rejection, 120 Hz | SVR | 76 | dB | IO = 5 mA, VI = 7 ± 1 V, f = 120 Hz | 20 | ||
| Supply voltage rejection, 1 kHz | SVR | 71 | dB | IO = 5 mA, VI = 7 ± 1 V, f = 1 kHz | 20 | ||
| Supply voltage rejection, 10 kHz | SVR | 60 | dB | IO = 5 mA, VI = 7 ± 1 V, f = 10 kHz | 20 | ||
| Output noise voltage | eN | 50 | µV | B = 10 Hz to 100 kHz | 20 | ||
| Control input current | II | 10 | µA | VI = 6 V, VC = 6 V | 20 | ||
| Thermal resistance junction-case (DPAK/PPAK) | RthJC | 8 | °C/W | DPAK/PPAK package | 5 | ||
| Thermal resistance junction-ambient (DPAK/PPAK) | RthJA | 100 | °C/W | DPAK/PPAK package | 5 |
CAD (KiCad official)
- Symbol:
LF50CDT-TR - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
lf50cdt-tr-etched.step/lf50cdt-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lf50cdt-tr.step/lf50cdt-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (53 pp, sha256
307003c143a6294f, retrieved 2026-10-20, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).