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LF50ABV

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STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-220-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LF50ABV

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-220-3

LF50ABV from STMicroelectronics, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Regulator input; operating input voltage is up to 16 V (absolute maximum -0.5 to 40 V, regulator in shutdown for 18 < VI < 40 V), with a 0.1 µF input capacitor used in the test circuit.
2 GROUND power_in Ground reference of the regulator, electrically connected to the TAB on the TO-220 package.
3 OUTPUT power_out Regulated 5 V output (LF50AB) delivering up to 500 mA, requiring an output capacitor of 2 to 10 µF with ESR 0.1 to 10 Ω for stability.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-220-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage VO 4.95 5 5.05 V IO = 50 mA, VI = 7 V 17
Output voltage over temperature VO 4.9 5.1 V IO = 50 mA, VI = 7 V, Ta = -25 to 85 °C 17
Operating input voltage VI 16 V IO = 500 mA 17
Line regulation ΔVO 5 25 mV VI = 6 to 16 V, IO = 5 mA 17
Load regulation ΔVO 5 25 mV VI = 6.3 V, IO = 5 to 500 mA 17
Quiescent current ON mode Id 0.5 1 mA VI = 6 to 16 V, IO = 0 mA, ON mode 17
Quiescent current ON mode, full load Id 12 mA VI = 6.3 to 16 V, IO = 500 mA 17
Quiescent current OFF mode Id 50 100 µA VI = 6 V, OFF mode 17
Dropout voltage Vd 0.2 0.35 V IO = 200 mA 17
Dropout voltage Vd 0.4 0.7 V IO = 500 mA 17
Control input logic low VIL 0.8 V Ta = -40 to 125 °C 17
Control input logic high VIH 2 V Ta = -40 to 125 °C 17
Control input current II 10 µA VI = 6 V, VC = 6 V 17
Output bypass capacitance CO 2 10 µF ESR = 0.1 to 10 Ω, IO = 0 to 500 mA 17
DC input voltage VI -0.5 40 V For 18 < VI < 40 the regulator is in shutdown 5
Storage temperature range TSTG -40 150 °C 5
Operating junction temperature range TOP -40 125 °C 5
Thermal resistance junction-case RthJC 5 °C/W TO-220 5
Thermal resistance junction-ambient RthJA 50 °C/W TO-220 5
Output current limit IO 1 A 17
Supply voltage rejection SVR 76 dB IO = 5 mA, VI = 7 ± 1 V, f = 120 Hz 17
Supply voltage rejection SVR 71 dB IO = 5 mA, VI = 7 ± 1 V, f = 1 kHz 17
Supply voltage rejection SVR 60 dB IO = 5 mA, VI = 7 ± 1 V, f = 10 kHz 17
Output noise voltage eN 50 µV B = 10 Hz to 100 kHz 17

CAD (KiCad official)

  • Symbol: LF50ABV
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: lf50abv-etched.step / lf50abv-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lf50abv.step / lf50abv.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (53 pp, sha256 307003c143a6294f, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF