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LF50ABDT-TRY

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs lf50abdt-try: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 24d ago
viewers lf50abdt-try: viewers · Ray 1mo ago
lf50abdt-try-etched.fit.json lf50abdt-try: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lf50abdt-try-etched.glb lf50abdt-try: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 24d ago
lf50abdt-try-etched.step lf50abdt-try: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 24d ago
lf50abdt-try.glb Publish 0.1.0 · Ray 1mo ago
lf50abdt-try.kicad_mod Publish 0.1.0 · Ray 1mo ago
lf50abdt-try.kicad_sym Publish 0.1.0 · Ray 1mo ago
lf50abdt-try.lbr Publish 0.1.0 · Ray 1mo ago
lf50abdt-try.step Publish 0.1.0 · Ray 1mo ago
package.json lf50abdt-try: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 24d ago
page.json lf50abdt-try: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 24d ago
README.md Initial commit: component/lf50abdt-try · Ray 1mo ago

LF50ABDT-TRY

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK

LF50ABDT-TRY from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Unregulated DC input supply pin to the regulator; per Figure 2 pin connections this lead is labeled INPUT (bottom lead, opposite side from the tab).
2 GND power_in Ground reference pin; the datasheet states the package TAB is electrically connected to GND on the DPAK package.
3 OUTPUT power_out Regulated output voltage pin, labeled OUTPUT (top lead) in Figure 2 pin connections.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: LF50ABDT-TRY
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: lf50abdt-try-etched.step / lf50abdt-try-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lf50abdt-try.step / lf50abdt-try.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (53 pp, sha256 1867ecd27e7bf609, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF