component
LF412CN
Public Made by Adomby adom
Texas Instruments FET InputAmplifiers, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLF412CN
Texas Instruments · FET InputAmplifiers · PDIP-8
LF412CN from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Output A | output | Amplifier A output; it can be shorted to ground indefinitely, but no more than one amplifier output should be shorted at the same time. |
| 2 | Inverting Input A | input | Amplifier A inverting input; it must not be driven below the negative supply, as this can cause large currents that destroy the unit. |
| 3 | Non-Inverting Input A | input | Amplifier A non-inverting input; it must not be driven below the negative supply, as this can cause large currents that destroy the unit. |
| 4 | V- | power_in | Negative supply; the LF412 recommended supply is ±15 V, and the minimum power supply voltage is ±5 V. |
| 5 | Non-Inverting Input B | input | Amplifier B non-inverting input; it must not be driven below the negative supply, as this can cause large currents that destroy the unit. |
| 6 | Inverting Input B | input | Amplifier B inverting input; it must not be driven below the negative supply, as this can cause large currents that destroy the unit. |
| 7 | Output B | output | Amplifier B output; it can be shorted to ground indefinitely, but no more than one amplifier output should be shorted at the same time. |
| 8 | V+ | power_in | Positive supply; the LF412 recommended supply is ±15 V, and the minimum power supply voltage is ±5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-8 |
| Category | Amplifiers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | -18 | 18 | V | LF412 column | 4 | ||
| Differential Input Voltage | -30 | 30 | V | LF412 column | 4 | ||
| Power Dissipation | 670 | mW | PDIP package; derate per θJA (note 6) | 4 | |||
| Maximum Junction Temperature | Tj max | 115 | °C | LF412 column | 4 | ||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | 10 s soldering | 4 | |||
| Supply Voltage LF412 | 15 | V | Printed ±15 V; column placement unclear in text | 4 | |||
| Minimum Power Supply Voltage | 5 | V | Section 9: minimum power supply voltage, printed ±5V | 16 | |||
| Operating Free-Air Temperature (commercial) | TA | 0 | 70 | °C | Commercial range, C suffix (footnote 7) | 4 | |
| Input Offset Voltage | VOS | 1 | 3 | mV | RS=10 kΩ, TA=25°C | 5 | |
| Input Offset Current | IOS | 25 | 100 | pA | Tj=25°C, VS=±15V | 5 | |
| Input Offset Current | IOS | 2 | nA | Tj=70°C, VS=±15V | 5 | ||
| Input Offset Current | IOS | 25 | nA | Tj=125°C, VS=±15V | 5 | ||
| Input Bias Current | IB | 50 | 200 | pA | Tj=25°C, VS=±15V | 5 | |
| Input Bias Current | IB | 4 | nA | Tj=70°C, VS=±15V | 5 | ||
| Input Bias Current | IB | 50 | nA | Tj=125°C, VS=±15V | 5 | ||
| Large Signal Voltage Gain | AVOL | 25 | 200 | V/mV | RL=2k, TA=25°C, VS=±15V, VO=±10V | 5 | |
| Large Signal Voltage Gain over temperature | AVOL | 15 | 200 | V/mV | RL=2k, VS=±15V, VO=±10V, over operating temperature range | 5 | |
| Output Voltage Swing | VO | 12 | 13.5 | V | VS=±15V, RL=10k; printed ±12 / ±13.5 | 5 | |
| Input Common-Mode Voltage Range (positive limit) | VCM | 11 | 14.5 | V | 5 | ||
| Input Common-Mode Voltage Range (negative limit) | VCM | -11.5 | V | 5 | |||
| Common-Mode Rejection Ratio | CMRR | 70 | 100 | dB | RS≤10k | 5 | |
| Supply Voltage Rejection Ratio | PSRR | 70 | 100 | dB | See note (3): VS = ±6V to ±15V | 5 | |
| Supply Current | IS | 3.6 | 6.5 | mA | VO = 0V, RL = ∞ | 5 | |
| Slew Rate | SR | 8 | 15 | V/μs | VS=±15V, TA=25°C | 6 | |
| Gain-Bandwidth Product | GBW | 2.7 | 4 | MHz | VS=±15V, TA=25°C | 6 | |
| Total Harmonic Distortion | THD | 0.02 | % | AV=+10, RL=10k, VO=20 Vp-p, BW=20 Hz-20 kHz | 6 | ||
| Junction-to-ambient thermal resistance (PDIP) | RθJA | 115 | °C/W | PDIP package | 5 |
CAD (KiCad official)
- Symbol:
LF412CN - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
lf412cn-etched.step/lf412cn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lf412cn.step/lf412cn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
2c6a0a9334ab7249, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).