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LF33CDT-TRY

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK

LF33CDT-TRY from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Regulator input; operating input voltage is up to 16 V (absolute maximum -0.5 to 40 V, and the regulator is in shutdown for 18 < VI < 40 V), and the 3-terminal device is fixed in the ON state.
2 GND power_in Ground reference, internally connected to the tab on the DPAK package.
3 OUTPUT power_out Regulated 3.3 V output for LF33C, up to 500 mA, current internally limited, needing a 2.2 µF output capacitor (ESR 0.1 to 10 Ω) for stability.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: LF33CDT-TRY
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: lf33cdt-try-etched.step / lf33cdt-try-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lf33cdt-try.step / lf33cdt-try.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (53 pp, sha256 307003c143a6294f, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF