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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	lf247dt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
viewers	lf247dt: viewers · Ray	28d ago
lf247dt-etched.fit.json	lf247dt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
lf247dt-etched.glb	lf247dt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
lf247dt-etched.step	lf247dt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
lf247dt.glb	Publish 0.1.0 · Ray	28d ago
lf247dt.kicad_mod	Publish 0.1.0 · Ray	28d ago
lf247dt.kicad_sym	Publish 0.1.0 · Ray	28d ago
lf247dt.lbr	Publish 0.1.0 · Ray	28d ago
lf247dt.step	Publish 0.1.0 · Ray	28d ago
package.json	Publish 0.1.0 · Ray	28d ago
page.json	Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray	12d ago
README.md	lf247dt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	18d ago

LF247DT

STMicroelectronics · FET InputAmplifiers · SOIC-14

LF247DT from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT1	output	Output of amplifier 1. Short-circuit protected to either supply. Typical output swing ±12 V into 2 kΩ at ±15 V supplies.
2	IN1-	input	Inverting input of amplifier 1. High-impedance JFET gate (Ri ≈ 10^12 Ω). Input bias current ~20 pA typ at 25°C.
3	IN1+	input	Non-inverting input of amplifier 1. High-impedance JFET gate. Common-mode range +15 V / -12 V (typ) at ±15 V supplies.
4	VCC+	power_in	Positive supply rail. Operating range up to ±18 V absolute maximum. Typical operation ±15 V; supply current ~1.4 mA per amplifier.
5	IN2+	input	Non-inverting input of amplifier 2. High-impedance JFET gate.
6	IN2-	input	Inverting input of amplifier 2. High-impedance JFET gate.
7	OUT2	output	Output of amplifier 2. Short-circuit protected. Slew rate 16 V/µs typ, gain-bandwidth 4 MHz typ.
8	OUT3	output	Output of amplifier 3. Short-circuit protected.
9	IN3-	input	Inverting input of amplifier 3. High-impedance JFET gate.
10	IN3+	input	Non-inverting input of amplifier 3. High-impedance JFET gate.
11	VCC-	power_in	Negative supply rail. Absolute maximum ±18 V (bipolar) or 36 V total across VCC+/VCC-. Typical operation at ±15 V.
12	IN4+	input	Non-inverting input of amplifier 4. High-impedance JFET gate.
13	IN4-	input	Inverting input of amplifier 4. High-impedance JFET gate.
14	OUT4	output	Output of amplifier 4. Short-circuit protected.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOIC-14
Category	Op-amp/Cmp
Pins	14

Ordering variants

Same part, different packaging or reel option.

LF247DTD
LF247DT
LF247DTN

CAD (KiCad official)

Symbol: LF247DT
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: lf247dt-etched.step / lf247dt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lf247dt.step / lf247dt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (10 pp, sha256 2e2081e9c6a90f86, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF