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LDTD123YLT1G

Public Made by Adom

by adom

LRC Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LDTD123YLT1G

LRC · Digital Transistors · SOT-23

LDTD123YLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base input of the NPN bias-resistor transistor; the built-in input resistor R1 is 2.2 kΩ and the input voltage range is −5 V to +12 V.
2 EMITTER passive Emitter terminal of the NPN transistor, with the built-in bias network (R2 = 10 kΩ) as shown in the equivalent circuit; the datasheet gives no separate emitter voltage limit.
3 COLLECTOR passive Collector output of the transistor; the datasheet limits the output current to 500 mA and the supply voltage (VCC) to 50 V.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (on) VI(on) 2 V VO=0.3V, IO=20mA 1
Input voltage (off) VI(off) 0.3 V VCC=5V, IO=100µA 1
Output voltage (on) VO(on) 0.1 0.3 V IO/II=50mA/2.5mA 1
Input current II 3.6 mA VI=5V 1
Output current (off) IO(off) 0.5 µA VCC=50V, VI=0V 1
DC current gain GI 56 − VO=5V, IO=50mA 1
Input resistance R1 1.54 2.2 2.86 kΩ 1
Resistance ratio R2/R1 3.6 4.5 5.5 − 1
Transition frequency fT 200 MHz VCE=10V, IE=−50mA, f=100MHz 1
Supply voltage VCC 50 V Ta=25°C 1
Input voltage VIN -5 12 V Ta=25°C 1
Output current IC 500 mA Ta=25°C 1
Power dissipation Pd 200 mW Ta=25°C 1
Junction temperature Tj 150 °C Ta=25°C 1
Storage temperature Tstg -55 150 °C Ta=25°C 1

CAD (KiCad official)

  • Symbol: LDTD123YLT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ldtd123ylt1g-etched.step / ldtd123ylt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ldtd123ylt1g.step / ldtd123ylt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (3 pp, sha256 16e7b44ea5680f45, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF