component
LDTC114EM3T5G
Public Made by Adomby adom
LRC Digital Transistors, SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LDTC114EM3T5G
LRC · Digital Transistors · SOT-723
LDTC114EM3T5G from LRC, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | input | Base (input) terminal of the bias resistor transistor, connected to the internal series base resistor R1, which is 10 kΩ typical (7.0 kΩ min, 13 kΩ max) for the LDTC114EM3T5G. |
| 2 | EMITTER | power_in | Emitter terminal, labelled GROUND on the datasheet, and the return for the internal base-emitter resistor R2; the datasheet gives no pin-specific voltage limit. |
| 3 | COLLECTOR | output | Collector (output) terminal; the device-level ratings are VCEO 50 Vdc and collector current IC 100 mAdc maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-723 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
LDTC114EM3T5G - Footprint:
Package_TO_SOT_SMD:SOT-723 - 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
ldtc114em3t5g-etched.step/ldtc114em3t5g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ldtc114em3t5g.step/ldtc114em3t5g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (12 pp, sha256
e76238a76cddf83e, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LDTC114EM3T5G
**LRC** · Digital Transistors · SOT-723
LDTC114EM3T5G from LRC, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | input | Base (input) terminal of the bias resistor transistor, connected to the internal series base resistor R1, which is 10 kΩ typical (7.0 kΩ min, 13 kΩ max) for the LDTC114EM3T5G. |
| 2 | EMITTER | power_in | Emitter terminal, labelled GROUND on the datasheet, and the return for the internal base-emitter resistor R2; the datasheet gives no pin-specific voltage limit. |
| 3 | COLLECTOR | output | Collector (output) terminal; the device-level ratings are VCEO 50 Vdc and collector current IC 100 mAdc maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-723 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `LDTC114EM3T5G`
- Footprint: `Package_TO_SOT_SMD:SOT-723`
- 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `ldtc114em3t5g-etched.step` / `ldtc114em3t5g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ldtc114em3t5g.step` / `ldtc114em3t5g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603129010830389248) (12 pp, sha256 `e76238a76cddf83e`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ldtc114em3t5g-datasheet.pdf)