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LDS3985M33R

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STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs lds3985m33r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers lds3985m33r: viewers · Ray 1mo ago
lds3985m33r-etched.fit.json lds3985m33r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lds3985m33r-etched.glb lds3985m33r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lds3985m33r-etched.step lds3985m33r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lds3985m33r.glb Publish 0.1.0 · Ray 1mo ago
lds3985m33r.kicad_mod Publish 0.1.0 · Ray 1mo ago
lds3985m33r.kicad_sym Publish 0.1.0 · Ray 1mo ago
lds3985m33r.lbr Publish 0.1.0 · Ray 1mo ago
lds3985m33r.step Publish 0.1.0 · Ray 1mo ago
package.json lds3985m33r: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json lds3985m33r: specified limits as data (metadata.characteristics, 39 rows from the datasheet) · Ray 25d ago
README.md lds3985m33r: specified limits as data (metadata.characteristics, 39 rows from the datasheet) · Ray 25d ago

LDS3985M33R

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LDS3985M33R from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VI power_in LDO input voltage operating from 2.5 V to 6 V
2 GND power_in Common ground
3 VINH input Inhibit input voltage enabling ON mode at ≥1.2 V and OFF mode at ≤0.4 V; must not be left floating
4 Bypass passive Bypass pin for external capacitor connection (typically 10 nF) to minimize noise voltage
5 VO output LDO regulated output voltage (3.3 V nominal for M33R variant)

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating input voltage VI 2.5 6 V 6
DC input voltage (absolute maximum) VI -0.3 6 V Input withstands non-repetitive 6.5 V spike for 200 ms (note 1) 5
DC output voltage (absolute maximum) VO -0.3 V Upper limit VI + 0.3 V as printed 5
Inhibit input voltage (absolute maximum) VINH -0.3 V Upper limit VI + 0.3 V as printed 5
Storage temperature range TSTG -65 150 °C 5
Operating junction temperature range (standard grade) TOP -40 125 °C 5
Output voltage accuracy, VO < 2.5 V VO -50 50 mV IO = 1 mA 6
Output voltage, VO < 2.5 V VO -75 75 mV TJ = -40 to 125 °C 6
Output voltage accuracy, VO ≥ 2.5 V VO -2 2 % IO = 1 mA 6
Output voltage, VO ≥ 2.5 V VO -3 3 % TJ = -40 to 125 °C 6
Line regulation ∆VO -0.1 0.1 %/V VI = VO(NOM) + 0.5 to 6 V, TJ = -40 to 125 °C 6
Load regulation, VO ≤ 2.5 V ∆VO 0.005 0.01 %/mA IO = 1 mA to 300 mA, VO ≤ 2.5 V, TJ = -40 to 125 °C 6
Load regulation, VO ≥ 2.5 V ∆VO 0.0008 0.004 %/mA IO = 1 mA to 300 mA, VO ≥ 2.5 V, TJ = -40 to 125 °C 6
Quiescent current, OFF mode IQ 1.5 µA OFF mode: VINH = 0.4 V, TJ = -40 to 125 °C 6
Quiescent current, IO = 0, TJ range IQ 150 µA IO = 0, TJ = -40 to 125 °C 6
Quiescent current, IO = 0 to 300 mA, TJ range IQ 300 µA IO = 0 to 300 mA, TJ = -40 to 125 °C 6
Dropout voltage, IO = 1 mA, TJ range VDROP 2 mV IO = 1 mA, TJ = -40 to 125 °C 6
Dropout voltage, IO = 150 mA, TJ range VDROP 100 mV IO = 150 mA, TJ = -40 to 125 °C 6
Dropout voltage, IO = 300 mA, TJ range VDROP 250 mV IO = 300 mA, TJ = -40 to 125 °C 6
Inhibit input logic low VINH 0.4 V VI = 2.5 V to 6 V, TJ = -40 to 125 °C 7
Inhibit input logic high VINH 1.4 V 7
Inhibit input current IINH -1 1 nA VINH = 0.4 V, VI = 6 V 7
Output capacitor capacitance CO 2.2 22 µF 7
Output capacitor ESR ESR 5 5000 mΩ 7
Peak output current IO(PK) 300 550 mA VO ≥ VO(NOM) - 5% 7
Quiescent current, ON mode, IO = 0 IQ 85 µA ON mode: VINH = 1.4 V, IO = 0 6
Quiescent current, ON mode, IO = 0 to 300 mA IQ 200 µA ON mode: VINH = 1.4 V, IO = 0 to 300 mA 6
Quiescent current, OFF mode IQ 0.003 µA OFF mode: VINH = 0.4 V 6
Dropout voltage, IO = 1 mA VDROP 0.4 mV IO = 1 mA 6
Dropout voltage, IO = 150 mA VDROP 60 mV IO = 150 mA 6
Dropout voltage, IO = 300 mA VDROP 150 mV IO = 300 mA 6
Short-circuit current ISC 600 mA RL = 0 7
Supply voltage rejection at 1 kHz SVR 55 dB VI = VO(NOM) + 0.25 V ± VRIPPLE = 0.1 V, IO = 50 mA, f = 1 kHz 7
Supply voltage rejection at 10 kHz SVR 50 dB VI = VO(NOM) + 0.25 V ± VRIPPLE = 0.1 V, IO = 50 mA, f = 10 kHz 7
Output noise voltage eN 30 µVRMS BW = 10 Hz to 100 kHz, CO = 2.2 µF 7
Turn-on time tON 240 µs CBYP = 33 nF 7
Thermal shutdown TSHDN 160 °C 7
Thermal resistance junction-case (SOT23-5L) RthJC 81 °C/W SOT23-5L column 5
Thermal resistance junction-ambient (SOT23-5L) RthJA 255 °C/W SOT23-5L column 5

CAD (KiCad official)

  • Symbol: LDS3985M33R
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lds3985m33r-etched.step / lds3985m33r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lds3985m33r.step / lds3985m33r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (21 pp, sha256 72544d5f7fa35736, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF