# LDL1117S12R

**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-4

LDL1117S12R from STMicroelectronics, in a SOT-223-4. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference connection. |
| 2 | VOUT | power_out | Regulated output voltage of 1.185 V at up to 1.2 A maximum current. |
| 3 | VIN | power_in | Input voltage supply ranging from 2.5 V to 18 V. |
| 4 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-223-4 |
| Category | Power Management (PMIC) |
| Pins | 4 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (TJ = 25 °C) | VOUT | -2 |  | 2 | % | IOUT = 10 mA, TJ = 25 °C | 6 |
| Output voltage accuracy (-40 °C to 125 °C) | VOUT | -3 |  | 3 | % | IOUT = 10 mA, -40 °C < TJ < 125 °C | 6 |
| Operating input voltage | VIN | 2.6 |  | 18 | V |  | 6 |
| UVLO turn-on threshold | VUVLO | 2.3 |  | 2.4 | V |  | 6 |
| UVLO hysteresis | VUVLO |  | 200 |  | mV |  | 6 |
| Line regulation | ΔVOUT |  | 0.002 | 0.02 | %/V | VOUT + 1 V (1) ≤ VIN ≤ 18 V, IOUT = 10 mA, -40 °C < TJ < 125 °C | 6 |
| Load regulation | ΔVOUT |  | 5 | 15 | mV | IOUT = 10 mA to 1.2 A, -40 °C < TJ < 125 °C | 6 |
| Supply voltage rejection (120 Hz) | SVR |  | 87 |  | dB | VIN = VOUT(NOM) + 1 V ± VRIPPLE, VRIPPLE = 0.5 V, f = 120 Hz | 6 |
| Supply voltage rejection (1 kHz) | SVR |  | 80 |  | dB | VIN = VOUT(NOM) + 1 V ± VRIPPLE, VRIPPLE = 0.5 V, f = 1 kHz | 6 |
| Supply voltage rejection (100 kHz) | SVR |  | 65 |  | dB | VIN = VOUT(NOM) + 1 V ± VRIPPLE, VRIPPLE = 0.5 V, f = 100 kHz | 6 |
| Quiescent current | IQ |  | 250 | 500 | µA | IOUT = 0 mA to 1.2 A, -40 °C < TJ < 125 °C | 6 |
| Output current (short-circuit / current limit) | ISC | 1.5 | 2 |  | A |  | 6 |
| Thermal shutdown | TSHDN |  | 175 |  | °C |  | 6 |
| Thermal shutdown hysteresis | TSHDN |  | 25 |  | °C | Hysteresis | 6 |
| Input supply voltage (absolute maximum) | VIN | -0.3 |  | 20 | V |  | 5 |
| Output voltage (absolute maximum) | VOUT | -0.3 |  |  | V | Upper limit printed as VIN + 0.3 V | 5 |
| Operating junction temperature | TJ-OP | -40 |  | 125 | °C |  | 5 |
| Maximum junction temperature | TJ-MAX |  |  | 150 | °C |  | 5 |
| Storage temperature | TSTG | -55 |  | 150 | °C |  | 5 |
| Thermal resistance junction-to-case | θJ-C |  | 15 |  | °C/W |  | 5 |
| Thermal resistance junction-to-ambient | θJ-A |  | 120 |  | °C/W |  | 5 |

## CAD (KiCad official)

- Symbol: `LDL1117S12R`
- Footprint: `Package_TO_SOT_SMD:SOT-223`
- 3D model: SOT-223-4 (KiCad packages3D, STEP)
- 3D model files: `ldl1117s12r-etched.step` / `ldl1117s12r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ldl1117s12r.step` / `ldl1117s12r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945830179459072) (23 pp, sha256 `ffbb9e03f7f6d0c4`, retrieved 2026-09-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ldl1117s12r-datasheet.pdf)